riscv
/
yosys
mirror of https://github.com/YosysHQ/yosys.git
1
0
Fork 0
Code Issues Projects Releases Wiki Activity

Rename to techmap_guard

This commit is contained in:
Eddie Hung 2019-09-12 17:45:02 -07:00
parent 6bb8e6a726
commit aaeaab4ac0
1 changed files with 3 additions and 2 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

5
techlibs/xilinx/abc_map.v
View File

@ -205,6 +205,7 @@ module DSP48E1 (
parameter [6:0] IS_OPMODE_INVERTED = 7'b0;
parameter _TECHMAP_CELLTYPE_ = "";
localparam techmap_guard = (_TECHMAP_CELLTYPE_ != "");
generate
if (USE_MULT == "MULTIPLY" && USE_DPORT == "FALSE") begin
@ -232,9 +233,9 @@ module DSP48E1 (
\$__ABC_DSP48E1_REG rC (.I(C), .O(iC), .Q(pC));
if (DREG == 0)
assign iD = D;
else if (_TECHMAP_CELLTYPE_ != "")
else if (techmap_guard)
$error("Invalid DSP48E1 configuration: DREG enabled but USE_DPORT == \"FALSE\"");
if (ADREG == 1 && _TECHMAP_CELLTYPE_ != "")
if (ADREG == 1 && techmap_guard)
$error("Invalid DSP48E1 configuration: ADREG enabled but USE_DPORT == \"FALSE\"");
if (PREG == 0) begin
if (MREG == 1)