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Merge pull request #1927 from YosysHQ/eddie/design_remove_assert 

kernel: Design::remove(RTLIL::Module *) to check refcount_modules_
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Eddie Hung 2020-04-16 08:06:12 -07:00 committed by GitHub
parent 90a1c6b6a4 75bb2c8c24
commit aa552cefa3
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2 changed files with 2 additions and 1 deletions
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1
kernel/rtlil.cc
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@ -597,6 +597,7 @@ void RTLIL::Design::remove(RTLIL::Module *module)
} }
log_assert(modules_.at(module->name) == module); log_assert(modules_.at(module->name) == module);
log_assert(refcount_modules_ == 0);
modules_.erase(module->name); modules_.erase(module->name);
delete module; delete module;
} }

2
passes/cmds/design.cc
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@ -340,7 +340,7 @@ struct DesignPass : public Pass {
if (reset_mode || !load_name.empty() || push_mode || pop_mode) if (reset_mode || !load_name.empty() || push_mode || pop_mode)
{ {
for (auto mod : design->modules()) for (auto mod : design->modules().to_vector())
design->remove(mod); design->remove(mod);
design->selection_stack.clear(); design->selection_stack.clear();