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Add abc_test024
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1423384367
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@ -230,10 +230,23 @@ module abc9_test022
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input wire i,
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input wire i,
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output wire [7:0] m_eth_payload_axis_tkeep
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output wire [7:0] m_eth_payload_axis_tkeep
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);
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);
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reg [7:0] m_eth_payload_axis_tkeep_reg = 8'd0;
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reg [7:0] m_eth_payload_axis_tkeep_reg = 8'd0;
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assign m_eth_payload_axis_tkeep = m_eth_payload_axis_tkeep_reg;
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assign m_eth_payload_axis_tkeep = m_eth_payload_axis_tkeep_reg;
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always @(posedge clk)
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always @(posedge clk)
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m_eth_payload_axis_tkeep_reg <= i ? 8'hff : 8'h0f;
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m_eth_payload_axis_tkeep_reg <= i ? 8'hff : 8'h0f;
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endmodule
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// Citation: https://github.com/riscv/riscv-bitmanip
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// TODO: yosys -p "synth_xilinx -abc9 -top abc9_test024" abc9.v -q
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// returns before 14233843
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// Warning: Wire abc9_test024.\dout [1] is used but has no driver.
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module abc9_test024 #(
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parameter integer N = 2,
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parameter integer M = 2
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) (
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input [7:0] din,
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output [M-1:0] dout
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);
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wire [2*M-1:0] mask = {M{1'b1}};
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assign dout = (mask << din[N-1:0]) >> M;
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endmodule
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endmodule
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