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Add newlines to help text for dfflegalize 

I think these were probably missed by accident. Spotted because GCC
spits out lots of messages like this:

passes/techmap/dfflegalize.cc:114:7: warning: zero-length gnu_printf format string [-Wformat-zero-length]
  114 |   log("");
      |       ^~

(because we tell GCC that the first argument to log() looks like a
printf control string in log.h, and a zero length such string triggers
a warning).
This commit is contained in:
Rupert Swarbrick 2020-07-03 11:12:03 +01:00 committed by Marcelina Kościelnicka
parent 3d8d98d709
commit a9b61080a4
1 changed files with 11 additions and 11 deletions
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22
passes/techmap/dfflegalize.cc
View File

@ -111,31 +111,31 @@ struct DffLegalizePass : public Pass {
log("- $_DLATCHSR_[NP][NP][NP]_\n");
log("\n");
log("The following transformations are performed by this pass:");
log("");
log("\n");
log("- upconversion from a less capable cell to a more capable cell, if the less");
log(" capable cell is not supported (eg. dff -> dffe, or adff -> dffsr)");
log("");
log("\n");
log("- unmapping FFs with clock enable (due to unsupported cell type or -mince)");
log("");
log("\n");
log("- unmapping FFs with sync reset (due to unsupported cell type or -minsrst)");
log("");
log("\n");
log("- adding inverters on the control pins (due to unsupported polarity)");
log("");
log("\n");
log("- adding inverters on the D and Q pins and inverting the init/reset values\n");
log(" (due to unsupported init or reset value)");
log("");
log("\n");
log("- converting sr into adlatch (by tying D to 1 and using E as set input)");
log("");
log("\n");
log("- emulating unsupported dffsr cell by adff + adff + sr + mux");
log("");
log("\n");
log("- emulating unsupported dlatchsr cell by adlatch + adlatch + sr + mux");
log("");
log("\n");
log("- emulating adff when the (reset, init) value combination is unsupported by\n");
log(" dff + adff + dlatch + mux");
log("");
log("\n");
log("- emulating adlatch when the (reset, init) value combination is unsupported by\n");
log("- dlatch + adlatch + dlatch + mux");
log("");
log("\n");
log("If the pass is unable to realize a given cell type (eg. adff when only plain dff");
log("is available), an error is raised.");
}