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Run muxpack and muxcover in synth_xilinx

This commit is contained in:
Eddie Hung 2019-06-06 14:43:08 -07:00
parent 7166dbe418
commit a8c49168fb
2 changed files with 18 additions and 1 deletions
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12
techlibs/xilinx/cells_map.v
View File

@ -250,3 +250,15 @@ module \$__XILINX_MUX_ (A, B, Y);
end end
endgenerate endgenerate
endmodule endmodule
module \$_MUX8_ (A, B, C, D, E, F, G, H, S, T, U, Y);
input A, B, C, D, E, F, G, H, S, T, U;
output Y;
\$__XILINX_MUX_ #(.A_SIGNED(0), .B_SIGNED(0), .A_WIDTH(8), .B_WIDTH(3), .Y_WIDTH(1)) _TECHMAP_REPLACE_ (.A({A,B,C,D,E,F,G,H}), .B({U,T,S}), .Y(Y));
endmodule
module \$_MUX16_ (A, B, C, D, E, F, G, H, I, J, K, L, M, N, O, P, S, T, U, V, Y);
input A, B, C, D, E, F, G, H, I, J, K, L, M, N, O, P, S, T, U, V;
output Y;
\$__XILINX_MUX_ #(.A_SIGNED(0), .B_SIGNED(0), .A_WIDTH(16), .B_WIDTH(3), .Y_WIDTH(1)) _TECHMAP_REPLACE_ (.A({A,B,C,D,E,F,G,H,I,J,K,L,M,N,O,P}), .B({V,U,T,S}), .Y(Y));
endmodule

7
techlibs/xilinx/synth_xilinx.cc
View File

@ -225,6 +225,9 @@ struct SynthXilinxPass : public ScriptPass
if (check_label("coarse")) { if (check_label("coarse")) {
run("synth -run coarse"); run("synth -run coarse");
if (!nomux || help_mode)
run("muxpack", "(skip if '-nomux')");
// shregmap -tech xilinx can cope with $shiftx and $mux // shregmap -tech xilinx can cope with $shiftx and $mux
// cells for identifying variable-length shift registers, // cells for identifying variable-length shift registers,
// so attempt to convert $pmux-es to the former // so attempt to convert $pmux-es to the former
@ -286,7 +289,9 @@ struct SynthXilinxPass : public ScriptPass
} }
if (check_label("map_cells")) { if (check_label("map_cells")) {
run("techmap -map +/techmap.v -map +/xilinx/cells_map.v -map +/xilinx/ff_map.v "); if (!nomux || help_mode)
run("muxcover", "(skip if '-nomux')");
run("techmap -map +/techmap.v -map +/xilinx/cells_map.v -map +/xilinx/ff_map.v");
run("dffinit -ff FDRE Q INIT -ff FDCE Q INIT -ff FDPE Q INIT -ff FDSE Q INIT " run("dffinit -ff FDRE Q INIT -ff FDCE Q INIT -ff FDPE Q INIT -ff FDSE Q INIT "
"-ff FDRE_1 Q INIT -ff FDCE_1 Q INIT -ff FDPE_1 Q INIT -ff FDSE_1 Q INIT"); "-ff FDRE_1 Q INIT -ff FDCE_1 Q INIT -ff FDPE_1 Q INIT -ff FDSE_1 Q INIT");
run("clean"); run("clean");