mirror of https://github.com/YosysHQ/yosys.git
Added smtbmc longopt support
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@ -42,24 +42,24 @@ yosys-smtbmc [options] <yosys_smt2_output>
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assume asserts in skipped steps in BMC
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assume asserts in skipped steps in BMC
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-S <step_size>
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-S <step_size>
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proof <step_size> time steps at once
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prove <step_size> time steps at once
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-c <vcd_filename>
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write counter-example to this VCD file
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(hint: use 'write_smt2 -wires' for maximum
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coverage of signals in generated VCD file)
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-i
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-i
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instead of BMC run temporal induction
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instead of BMC run temporal induction
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-m <module_name>
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-m <module_name>
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name of the top module
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name of the top module
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--dump-vcd <vcd_filename>
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write counter-example to this VCD file
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(hint: use 'write_smt2 -wires' for maximum
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coverage of signals in generated VCD file)
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""" + so.helpmsg())
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""" + so.helpmsg())
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sys.exit(1)
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sys.exit(1)
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try:
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try:
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opts, args = getopt.getopt(sys.argv[1:], so.optstr + "t:u:S:c:im:")
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opts, args = getopt.getopt(sys.argv[1:], so.shortopts + "t:u:S:im:", so.longopts + ["dump-vcd="])
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except:
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except:
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usage()
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usage()
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@ -75,7 +75,7 @@ for o, a in opts:
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assume_skipped = int(a)
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assume_skipped = int(a)
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elif o == "-S":
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elif o == "-S":
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step_size = int(a)
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step_size = int(a)
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elif o == "-c":
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elif o == "--dump-vcd":
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vcdfile = a
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vcdfile = a
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elif o == "-i":
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elif o == "-i":
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tempind = True
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tempind = True
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@ -348,7 +348,8 @@ class smtio:
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class smtopts:
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class smtopts:
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def __init__(self):
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def __init__(self):
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self.optstr = "s:d:vp"
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self.shortopts = "s:v"
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self.longopts = ["no-progress", "dump-smt2="]
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self.solver = "z3"
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self.solver = "z3"
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self.debug_print = False
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self.debug_print = False
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self.debug_file = None
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self.debug_file = None
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@ -359,9 +360,9 @@ class smtopts:
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self.solver = a
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self.solver = a
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elif o == "-v":
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elif o == "-v":
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self.debug_print = True
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self.debug_print = True
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elif o == "-p":
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elif o == "--no-progress":
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self.timeinfo = True
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self.timeinfo = True
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elif o == "-d":
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elif o == "--dump-smt2":
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self.debug_file = open(a, "w")
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self.debug_file = open(a, "w")
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else:
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else:
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return False
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return False
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@ -376,10 +377,10 @@ class smtopts:
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-v
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-v
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enable debug output
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enable debug output
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-p
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--no-progress
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disable timer display during solving
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disable running timer display during solving
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-d <filename>
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--dump-smt2 <filename>
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write smt2 statements to file
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write smt2 statements to file
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"""
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"""
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@ -1,7 +1,7 @@
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demo1: demo1.smt2
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demo1: demo1.smt2
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yosys-smtbmc -c demo1.vcd demo1.smt2
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yosys-smtbmc --dump-vcd demo1.vcd demo1.smt2
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yosys-smtbmc -i -c demo1.vcd demo1.smt2
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yosys-smtbmc -i --dump-vcd demo1.vcd demo1.smt2
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demo1.smt2: demo1.v
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demo1.smt2: demo1.v
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yosys -p 'read_verilog -formal demo1.v; prep -top demo1; write_smt2 -wires -mem -bv demo1.smt2'
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yosys -p 'read_verilog -formal demo1.v; prep -top demo1; write_smt2 -wires -mem -bv demo1.smt2'
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