From a7988c01af4bab7390c60fdde04b92ed816aa306 Mon Sep 17 00:00:00 2001 From: Clifford Wolf Date: Sat, 5 Jan 2013 11:44:47 +0100 Subject: [PATCH] Copy attributes from state signal to fsm cell --- passes/fsm/fsm_extract.cc | 1 + 1 file changed, 1 insertion(+) diff --git a/passes/fsm/fsm_extract.cc b/passes/fsm/fsm_extract.cc index bdcb1d45a..c89078cd3 100644 --- a/passes/fsm/fsm_extract.cc +++ b/passes/fsm/fsm_extract.cc @@ -283,6 +283,7 @@ static void extract_fsm(RTLIL::Wire *wire) fsm_cell->connections["\\CTRL_IN"] = ctrl_in; fsm_cell->connections["\\CTRL_OUT"] = ctrl_out; fsm_cell->parameters["\\NAME"] = RTLIL::Const(wire->name); + fsm_cell->attributes = wire->attributes; fsm_data.copy_to_cell(fsm_cell); module->cells[fsm_cell->name] = fsm_cell;