mirror of https://github.com/YosysHQ/yosys.git
Fixed abc pass blif parser for constant bits
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parent
63060dcd2e
commit
a694324a75
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@ -22,6 +22,28 @@
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#include <stdio.h>
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#include <stdio.h>
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#include <string.h>
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#include <string.h>
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static bool read_next_line(char *buffer, int &line_count, FILE *f)
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{
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buffer[0] = 0;
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while (1)
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{
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int buffer_len = strlen(buffer);
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while (buffer_len > 0 && (buffer[buffer_len-1] == ' ' || buffer[buffer_len-1] == '\t' ||
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buffer[buffer_len-1] == '\r' || buffer[buffer_len-1] == '\n'))
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buffer[--buffer_len] = 0;
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if (buffer_len == 0 || buffer[buffer_len-1] == '\\') {
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if (buffer[buffer_len-1] == '\\')
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buffer[--buffer_len] = 0;
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line_count++;
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if (fgets(buffer+buffer_len, 4096-buffer_len, f) == NULL)
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return false;
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} else
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return true;
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}
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}
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RTLIL::Design *abc_parse_blif(FILE *f)
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RTLIL::Design *abc_parse_blif(FILE *f)
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{
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{
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RTLIL::Design *design = new RTLIL::Design;
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RTLIL::Design *design = new RTLIL::Design;
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@ -39,25 +61,10 @@ RTLIL::Design *abc_parse_blif(FILE *f)
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while (1)
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while (1)
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{
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{
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buffer[0] = 0;
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if (!read_next_line(buffer, line_count, f))
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goto error;
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while (1)
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{
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int buffer_len = strlen(buffer);
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while (buffer_len > 0 && (buffer[buffer_len-1] == ' ' || buffer[buffer_len-1] == '\t' ||
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buffer[buffer_len-1] == '\r' || buffer[buffer_len-1] == '\n'))
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buffer[--buffer_len] = 0;
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if (buffer_len == 0 || buffer[buffer_len-1] == '\\') {
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if (buffer[buffer_len-1] == '\\')
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buffer[--buffer_len] = 0;
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line_count++;
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if (fgets(buffer+buffer_len, 4096-buffer_len, f) == NULL)
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goto error;
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} else
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break;
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}
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continue_without_read:
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if (buffer[0] == '#')
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if (buffer[0] == '#')
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continue;
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continue;
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@ -112,6 +119,38 @@ RTLIL::Design *abc_parse_blif(FILE *f)
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output_sig = input_sig.extract(input_sig.width-1, 1);
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output_sig = input_sig.extract(input_sig.width-1, 1);
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input_sig = input_sig.extract(0, input_sig.width-1);
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input_sig = input_sig.extract(0, input_sig.width-1);
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if (input_sig.width == 0) {
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RTLIL::State state = RTLIL::State::Sa;
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while (1) {
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if (!read_next_line(buffer, line_count, f))
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goto error;
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for (int i = 0; buffer[i]; i++) {
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if (buffer[i] == ' ' || buffer[i] == '\t')
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continue;
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if (i == 0 && buffer[i] == '.')
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goto finished_parsing_constval;
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if (buffer[i] == '0') {
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if (state == RTLIL::State::S1)
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goto error;
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state = RTLIL::State::S0;
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continue;
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}
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if (buffer[i] == '1') {
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if (state == RTLIL::State::S0)
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goto error;
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state = RTLIL::State::S1;
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continue;
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}
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goto error;
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}
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}
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finished_parsing_constval:
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if (state == RTLIL::State::Sa)
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state = RTLIL::State::S1;
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module->connections.push_back(RTLIL::SigSig(output_sig, state));
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goto continue_without_read;
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}
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input_sig.optimize();
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input_sig.optimize();
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output_sig.optimize();
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output_sig.optimize();
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