CMake: added passes

CMakeLists.txt

@@ -53,7 +53,15 @@ add_subdirectory(backends/spice)
 add_subdirectory(backends/table)
 add_subdirectory(backends/verilog)
 add_subdirectory(passes/cmds)
+add_subdirectory(passes/equiv)
+add_subdirectory(passes/fsm)
+add_subdirectory(passes/memory)
+add_subdirectory(passes/opt)
+#add_subdirectory(passes/pmgen)
+add_subdirectory(passes/proc)
+add_subdirectory(passes/sat)
 add_subdirectory(passes/techmap)
+add_subdirectory(passes/tests)
 add_subdirectory(techlibs/common)
 
 target_link_libraries(yosys PRIVATE z)

passes/equiv/CMakeLists.txt

@@ -0,0 +1,17 @@
+add_library(yosys_passes_equiv INTERFACE)
+
+target_sources(yosys_passes_equiv INTERFACE
+    equiv_make.cc
+    equiv_miter.cc
+    equiv_simple.cc
+    equiv_status.cc
+    equiv_add.cc
+    equiv_remove.cc
+    equiv_induct.cc
+    equiv_struct.cc
+    equiv_purge.cc
+    equiv_mark.cc
+    equiv_opt.cc
+)
+
+target_link_libraries(yosys PRIVATE yosys_passes_equiv)

passes/fsm/CMakeLists.txt

@@ -0,0 +1,16 @@
+add_library(yosys_passes_fsm INTERFACE)
+
+target_sources(yosys_passes_fsm INTERFACE
+    fsm.cc
+    fsm_detect.cc
+    fsm_extract.cc
+    fsm_opt.cc
+    fsm_expand.cc
+    fsm_recode.cc
+    fsm_info.cc
+    fsm_export.cc
+    fsm_map.cc
+    fsmdata.h
+)
+
+target_link_libraries(yosys PRIVATE yosys_passes_fsm)

passes/memory/CMakeLists.txt

@@ -0,0 +1,20 @@
+add_library(yosys_passes_memory INTERFACE)
+
+target_sources(yosys_passes_memory INTERFACE
+    memory.cc
+    memory_dff.cc
+    memory_share.cc
+    memory_collect.cc
+    memory_unpack.cc
+    memory_bram.cc
+    memory_map.cc
+    memory_memx.cc
+    memory_nordff.cc
+    memory_narrow.cc
+    memory_libmap.cc
+    memory_bmux2rom.cc
+    memlib.cc
+    memlib.h
+)
+
+target_link_libraries(yosys PRIVATE yosys_passes_memory)

passes/opt/CMakeLists.txt

@@ -0,0 +1,27 @@
+add_library(yosys_passes_opt INTERFACE)
+
+target_sources(yosys_passes_opt INTERFACE
+    opt.cc
+    opt_merge.cc
+    opt_mem.cc
+    opt_mem_feedback.cc
+    opt_mem_priority.cc
+    opt_mem_widen.cc
+    opt_muxtree.cc
+    opt_reduce.cc
+    opt_dff.cc
+    opt_share.cc
+    opt_clean.cc
+    opt_expr.cc
+    share.cc
+    wreduce.cc
+    opt_demorgan.cc
+    rmports.cc
+    opt_lut.cc
+    opt_lut_ins.cc
+    opt_ffinv.cc
+    pmux2shiftx.cc
+    muxpack.cc
+)
+
+target_link_libraries(yosys PRIVATE yosys_passes_opt)

passes/proc/CMakeLists.txt

@@ -0,0 +1,17 @@
+add_library(yosys_passes_proc INTERFACE)
+
+target_sources(yosys_passes_proc INTERFACE
+    proc.cc
+    proc_prune.cc
+    proc_clean.cc
+    proc_rmdead.cc
+    proc_init.cc
+    proc_arst.cc
+    proc_rom.cc
+    proc_mux.cc
+    proc_dlatch.cc
+    proc_dff.cc
+    proc_memwr.cc
+)
+
+target_link_libraries(yosys PRIVATE yosys_passes_proc)

passes/sat/CMakeLists.txt

@@ -0,0 +1,25 @@
+add_library(yosys_passes_sat INTERFACE)
+
+target_sources(yosys_passes_sat INTERFACE
+    sat.cc
+    freduce.cc
+    eval.cc
+    sim.cc
+    miter.cc
+    expose.cc
+    assertpmux.cc
+    clk2fflogic.cc
+    async2sync.cc
+    formalff.cc
+    supercover.cc
+    fmcombine.cc
+    mutate.cc
+    cutpoint.cc
+    fminit.cc
+    recover_names.cc
+    qbfsat.cc
+    synthprop.cc
+
+)
+
+target_link_libraries(yosys PRIVATE yosys_passes_sat)

passes/techmap/CMakeLists.txt

@@ -1,7 +1,49 @@
 add_library(yosys_passes_techmap INTERFACE)
 
 target_sources(yosys_passes_techmap INTERFACE
+    flatten.cc
+    techmap.cc
+    simplemap.cc
+    dfflibmap.cc
+    maccmap.cc
+    booth.cc
     libparse.cc
+    abc.cc
+    abc9.cc
+    abc9_exe.cc
+    abc9_ops.cc
+    abc_new.cc
+    iopadmap.cc
+    clkbufmap.cc
+    hilomap.cc
+    extract.cc
+    extract_fa.cc
+    extract_counter.cc
+    extract_reduce.cc
+    alumacc.cc
+    dffinit.cc
+    pmuxtree.cc
+    bmuxmap.cc
+    demuxmap.cc
+    bwmuxmap.cc
+    muxcover.cc
+    aigmap.cc
+    tribuf.cc
+    lut2mux.cc
+    nlutmap.cc
+    shregmap.cc
+    deminout.cc
+    insbuf.cc
+    bufnorm.cc
+    attrmvcp.cc
+    attrmap.cc
+    zinit.cc
+    dfflegalize.cc
+    dffunmap.cc
+    flowmap.cc
+    extractinv.cc
+    cellmatch.cc
+    clockgate.cc
 )
 
 target_link_libraries(yosys PRIVATE yosys_passes_techmap)

passes/tests/CMakeLists.txt

@@ -0,0 +1,9 @@
+add_library(yosys_passes_tests INTERFACE)
+
+target_sources(yosys_passes_tests INTERFACE
+    test_autotb.cc
+    test_cell.cc
+    test_abcloop.cc
+)
+
+target_link_libraries(yosys PRIVATE yosys_passes_tests)