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also optimize single-bit "$mux" cells in pass "opt_const", added suggestions 

for more optimizations
This commit is contained in:
Johann Glaser 2013-03-18 22:05:21 +01:00
parent 15ad2db8fc
commit a4e2c887f1
1 changed files with 5 additions and 1 deletions
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6
passes/opt/opt_const.cc
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@ -113,7 +113,7 @@ void replace_const_cells(RTLIL::Design *design, RTLIL::Module *module)
if (input.match("0 ")) ACTION_DO("\\Y", input.extract(0, 1)); if (input.match("0 ")) ACTION_DO("\\Y", input.extract(0, 1));
} }
if (cell->type == "$_MUX_") { if (cell->type == "$_MUX_" ||(cell->type == "$mux" && cell->parameters["\\WIDTH"].as_int() == 1)) {
RTLIL::SigSpec input; RTLIL::SigSpec input;
input.append(cell->connections["\\S"]); input.append(cell->connections["\\S"]);
input.append(cell->connections["\\B"]); input.append(cell->connections["\\B"]);
@ -125,6 +125,10 @@ void replace_const_cells(RTLIL::Design *design, RTLIL::Module *module)
if (input.match(" 1")) ACTION_DO("\\Y", input.extract(1, 1)); if (input.match(" 1")) ACTION_DO("\\Y", input.extract(1, 1));
#ifdef MUX_UNDEF_SEL_TO_UNDEF_RESULTS #ifdef MUX_UNDEF_SEL_TO_UNDEF_RESULTS
if (input.match("01 ")) ACTION_DO("\\Y", input.extract(0, 1)); if (input.match("01 ")) ACTION_DO("\\Y", input.extract(0, 1));
// TODO: "0 " -> replace with "B AND S" gate
// TODO: " 1 " -> replace with "A OR S" gate
// TODO: "1 " -> replace with "B OR !S" gate
// TODO: " 0 " -> replace with "A AND !S" gate
if (input.match(" *")) ACTION_DO_Y(x); if (input.match(" *")) ACTION_DO_Y(x);
#endif #endif
} }