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Merge branch 'xaig' into xaig_dff

This commit is contained in:
Eddie Hung 2019-06-17 13:20:19 -07:00
parent 7dd3a7f161 63fc879a5f
commit a474fe937b
1 changed files with 4 additions and 3 deletions
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7
passes/techmap/abc9.cc
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@ -608,11 +608,12 @@ void abc9_module(RTLIL::Design *design, RTLIL::Module *current_module, std::stri
if (markgroups) cell->attributes["\\abcgroup"] = map_autoidx;
RTLIL::Cell *existing_cell = module->cell(c->name);
if (existing_cell) {
cell->parameters = std::move(existing_cell->parameters);
cell->attributes = std::move(existing_cell->attributes);
cell->parameters = existing_cell->parameters;
cell->attributes = existing_cell->attributes;
}
else {
cell->parameters = std::move(c->parameters);
cell->parameters = c->parameters;
cell->attributes = c->attributes;
}
for (auto &conn : c->connections()) {
RTLIL::SigSpec newsig;