mirror of https://github.com/YosysHQ/yosys.git
Merge pull request #889 from YosysHQ/clifford/fix888
Fix mem2reg handling of memories with upto data ports
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commit
a440f82586
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@ -138,9 +138,15 @@ bool AstNode::simplify(bool const_fold, bool at_zero, bool in_lvalue, int stage,
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int mem_width, mem_size, addr_bits;
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node->meminfo(mem_width, mem_size, addr_bits);
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int data_range_left = node->children[0]->range_left;
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int data_range_right = node->children[0]->range_right;
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if (node->children[0]->range_swapped)
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std::swap(data_range_left, data_range_right);
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for (int i = 0; i < mem_size; i++) {
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AstNode *reg = new AstNode(AST_WIRE, new AstNode(AST_RANGE,
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mkconst_int(mem_width-1, true), mkconst_int(0, true)));
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mkconst_int(data_range_left, true), mkconst_int(data_range_right, true)));
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reg->str = stringf("%s[%d]", node->str.c_str(), i);
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reg->is_reg = true;
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reg->is_signed = node->is_signed;
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@ -976,6 +982,9 @@ bool AstNode::simplify(bool const_fold, bool at_zero, bool in_lvalue, int stage,
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int data_range_left = id2ast->children[0]->range_left;
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int data_range_right = id2ast->children[0]->range_right;
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if (id2ast->children[0]->range_swapped)
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std::swap(data_range_left, data_range_right);
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std::stringstream sstr;
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sstr << "$mem2bits$" << str << "$" << filename << ":" << linenum << "$" << (autoidx++);
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std::string wire_id = sstr.str();
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