From a38b0f38c687598224ba27d15375400fdcc160e4 Mon Sep 17 00:00:00 2001 From: "Emil J. Tywoniak" Date: Fri, 4 Oct 2024 13:20:15 +0200 Subject: [PATCH] abc: sort stats --- passes/techmap/abc.cc | 1 + 1 file changed, 1 insertion(+) diff --git a/passes/techmap/abc.cc b/passes/techmap/abc.cc index 07f9ee45d..cc37677ce 100644 --- a/passes/techmap/abc.cc +++ b/passes/techmap/abc.cc @@ -1411,6 +1411,7 @@ void abc_module(RTLIL::Design *design, RTLIL::Module *current_module, std::strin module->connect(conn); } + cell_stats.sort(); for (auto &it : cell_stats) log("ABC RESULTS: %15s cells: %8d\n", it.first.c_str(), it.second); int in_wires = 0, out_wires = 0;