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Do not check signedness of post-adder (assume taken care of by DSP)

This commit is contained in:
Eddie Hung 2019-09-05 12:38:47 -07:00
parent 7bd55f379c
commit a32b14a55f
2 changed files with 0 additions and 3 deletions
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2
passes/pmgen/xilinx_dsp.cc
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@ -52,8 +52,6 @@ void pack_xilinx_dsp(dict<SigBit, Cell*> &bit_to_driver, xilinx_dsp_pm &pm)
SigSpec P = st.sigP;
if (st.postAdd) {
log_assert(st.postAdd->getParam("\\A_SIGNED").as_bool());
log_assert(st.postAdd->getParam("\\B_SIGNED").as_bool());
log(" adder %s (%s)\n", log_id(st.postAdd), log_id(st.postAdd->type));
SigSpec &opmode = cell->connections_.at("\\OPMODE");

1
passes/pmgen/xilinx_dsp.pmg
View File

@ -173,7 +173,6 @@ match postAdd
if port(dsp, \OPMODE).extract(4,3).is_fully_zero()
select postAdd->type.in($add)
select param(postAdd, \A_SIGNED).as_bool() && param(postAdd, \B_SIGNED).as_bool()
choice <IdString> AB {\A, \B}
select nusers(port(postAdd, AB)) <= 3
filter ffMmux || nusers(port(postAdd, AB)) == 2