From a2b2904ed899f22aae91c9dc033a692622e72fd7 Mon Sep 17 00:00:00 2001
From: Krystine Sherwin <93062060+KrystalDelusion@users.noreply.github.com>
Date: Fri, 12 Apr 2024 13:57:51 +1200
Subject: [PATCH] cellhelp: Add source line to help

Include Source file and line number in SimHelper struct, and use it for verilog code caption in rst dump.
Also reformat python string conversion to iterate over a list of fields instead of repeating code for each.
---
 kernel/register.cc          |  4 +++-
 techlibs/common/cellhelp.py | 21 +++++++++++++++------
 2 files changed, 18 insertions(+), 7 deletions(-)

diff --git a/kernel/register.cc b/kernel/register.cc
index fe3495dad..99225ba51 100644
--- a/kernel/register.cc
+++ b/kernel/register.cc
@@ -757,6 +757,7 @@ struct SimHelper {
 	}
 	string title;
 	string ports;
+	string source;
 	string desc;
 	string code;
 	string ver;
@@ -901,7 +902,8 @@ struct HelpPass : public Pass {
 		// source code
 		fprintf(f, "Simulation model (Verilog)\n");
 		fprintf(f, "--------------------------\n\n");
-		fprintf(f, ".. code:: verilog\n\n");
+		fprintf(f, ".. code-block:: verilog\n");
+		fprintf(f, "   :caption: %s\n\n", cell.source.c_str());
 		std::stringstream ss;
 		ss << cell.code;
 		for (std::string line; std::getline(ss, line, '\n');) {
diff --git a/techlibs/common/cellhelp.py b/techlibs/common/cellhelp.py
index 312446ad4..1d55d17f5 100644
--- a/techlibs/common/cellhelp.py
+++ b/techlibs/common/cellhelp.py
@@ -3,11 +3,13 @@
 from __future__ import annotations
 import fileinput
 import json
+from pathlib import Path
 
 class SimHelper:
     name: str = ""
     title: str = ""
     ports: str = ""
+    source: str = ""
     desc: list[str]
     code: list[str]
     ver: str = "1"
@@ -16,14 +18,19 @@ class SimHelper:
         self.desc = []
     
     def __str__(self) -> str:
+        printed_fields = [
+            "name", "title", "ports", "source", "desc", "code", "ver",
+        ]
+        # generate C++ struct
         val = "tempCell = {\n"
-        val += f'  {json.dumps(self.name)},\n'
-        val += f'  {json.dumps(self.title)},\n'
-        val += f'  {json.dumps(self.ports)},\n'
-        val += '  ' + json.dumps("\n".join(self.desc)) + ',\n'
-        val += '  ' + json.dumps("\n".join(self.code)) + ',\n'
-        val += f'  {json.dumps(self.ver)},\n'
+        for field in printed_fields:
+            field_val = getattr(self, field)
+            if isinstance(field_val, list):
+                field_val = "\n".join(field_val)
+            val += f'  {json.dumps(field_val)},\n'
         val += "};\n"
+
+        # map name to struct
         val += f'cell_help[{json.dumps(self.name)}] = tempCell;'
         val += "\n"
         val += f'cell_code[{json.dumps(self.name + "+")}] = tempCell;'
@@ -45,6 +52,8 @@ for line in fileinput.input():
         clean_line = line[7:].replace("\\", "").replace(";", "")
         simHelper.name, simHelper.ports = clean_line.split(maxsplit=1)
         simHelper.code = []
+        short_filename = Path(fileinput.filename()).name
+        simHelper.source = f'{short_filename}:{fileinput.filelineno()}'
     elif not line.startswith("endmodule"):
         line = "    " + line
     try: