mirror of https://github.com/YosysHQ/yosys.git
Added mkhash_xorshift()
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@ -31,6 +31,20 @@ inline unsigned int mkhash_add(unsigned int a, unsigned int b) {
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return ((a << 5) + a) + b;
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}
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inline unsigned int mkhash_xorshift(unsigned int a) {
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if (sizeof(a) == 4) {
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a ^= a << 13;
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a ^= a >> 17;
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a ^= a << 5;
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} else if (sizeof(a) == 8) {
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a ^= a << 13;
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a ^= a >> 7;
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a ^= a << 17;
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} else
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throw std::runtime_error("mkhash_xorshift() only implemented for 32 bit and 64 bit ints");
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return a;
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}
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template<typename T> struct hash_ops {
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bool cmp(const T &a, const T &b) const {
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return a == b;
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@ -122,7 +136,11 @@ inline int hashtable_size(int old_size)
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if (old_size < 250999999) return 250999999;
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if (old_size < 503000009) return 503000009;
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if (old_size < 1129999999) return 1129999999;
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throw std::length_error("hash table exceeded maximum size");
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if (sizeof(old_size) == 4)
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throw std::length_error("hash table exceeded maximum size. recompile with -mint64.");
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return old_size * 2;
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}
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template<typename K, typename T, typename OPS = hash_ops<K>>
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@ -236,8 +236,9 @@ void RTLIL::Selection::optimize(RTLIL::Design *design)
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RTLIL::Design::Design()
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{
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static unsigned int hashidx_count = 0;
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hashidx_ = hashidx_count++;
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static unsigned int hashidx_count = 123456789;
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hashidx_count = mkhash_xorshift(hashidx_count);
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hashidx_ = hashidx_count;
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refcount_modules_ = 0;
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selection_stack.push_back(RTLIL::Selection());
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@ -450,8 +451,9 @@ std::vector<RTLIL::Module*> RTLIL::Design::selected_whole_modules_warn() const
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RTLIL::Module::Module()
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{
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static unsigned int hashidx_count = 0;
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hashidx_ = hashidx_count++;
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static unsigned int hashidx_count = 123456789;
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hashidx_count = mkhash_xorshift(hashidx_count);
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hashidx_ = hashidx_count;
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design = nullptr;
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refcount_wires_ = 0;
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@ -1741,8 +1743,9 @@ RTLIL::Cell* RTLIL::Module::addDlatchsrGate(RTLIL::IdString name, RTLIL::SigSpec
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RTLIL::Wire::Wire()
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{
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static unsigned int hashidx_count = 0;
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hashidx_ = hashidx_count++;
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static unsigned int hashidx_count = 123456789;
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hashidx_count = mkhash_xorshift(hashidx_count);
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hashidx_ = hashidx_count;
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module = nullptr;
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width = 1;
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@ -1755,8 +1758,9 @@ RTLIL::Wire::Wire()
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RTLIL::Memory::Memory()
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{
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static unsigned int hashidx_count = 0;
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hashidx_ = hashidx_count++;
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static unsigned int hashidx_count = 123456789;
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hashidx_count = mkhash_xorshift(hashidx_count);
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hashidx_ = hashidx_count;
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width = 1;
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size = 0;
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@ -1764,8 +1768,9 @@ RTLIL::Memory::Memory()
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RTLIL::Cell::Cell() : module(nullptr)
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{
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static unsigned int hashidx_count = 0;
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hashidx_ = hashidx_count++;
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static unsigned int hashidx_count = 123456789;
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hashidx_count = mkhash_xorshift(hashidx_count);
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hashidx_ = hashidx_count;
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// log("#memtrace# %p\n", this);
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memhasher();
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@ -712,8 +712,9 @@ struct RTLIL::Monitor
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unsigned int hash() const { return hashidx_; }
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Monitor() {
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static unsigned int hashidx_count = 0;
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hashidx_ = hashidx_count++;
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static unsigned int hashidx_count = 123456789;
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hashidx_count = mkhash_xorshift(hashidx_count);
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hashidx_ = hashidx_count;
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}
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virtual ~Monitor() { }
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@ -136,6 +136,7 @@ using std::vector;
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using std::string;
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using hashlib::mkhash;
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using hashlib::mkhash_add;
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using hashlib::mkhash_xorshift;
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using hashlib::hash_ops;
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using hashlib::hash_cstr_ops;
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using hashlib::hash_ptr_ops;
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