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machxo2: Fix reversed interpretation of REG_SD config bits.

This commit is contained in:
William D. Jones 2021-01-31 19:05:15 -05:00 committed by Marcelina Kościelnicka
parent 4e9def23de
commit a1ea1430b6
1 changed files with 2 additions and 2 deletions
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4
techlibs/machxo2/cells_sim.v
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@ -146,8 +146,8 @@ module FACADE_SLICE #(
/* Reg can be fed either by M, or DI inputs; DI inputs muxes OFX and F
outputs (in other words, feeds back into FACADE_SLICE). */
wire di0 = (REG0_SD == "1") ? M0 : DI0;
wire di1 = (REG1_SD == "1") ? M1 : DI1;
wire di0 = (REG0_SD == "1") ? DI0 : M0;
wire di1 = (REG1_SD == "1") ? DI1 : M1;
FACADE_FF#(.GSR(GSR), .CEMUX(CEMUX), .CLKMUX(CLKMUX), .LSRMUX(LSRMUX),
.LSRONMUX(LSRONMUX), .SRMODE(SRMODE), .REGSET(REG0_REGSET),