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More updates on CHANGELOG

This commit is contained in:
Miodrag Milanovic 2022-06-08 11:41:13 +02:00
parent 096f3d2aa4
commit a0172e68c5
1 changed files with 9 additions and 5 deletions
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14
CHANGELOG
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@ -5,13 +5,14 @@ List of major changes and improvements between releases
Yosys 0.17 .. Yosys 0.17-dev
--------------------------
* New commands and options
- Added "memory_bmux2rom" - converts muxes to ROMs
- Added "memory_libmap" pass
- Added "memory_bmux2rom" pass - converts muxes to ROMs
- Added "memory_dff -no-rw-check"
- Added "opt_ffinv" - push inverters through FFs
- Added "proc_rom" - convert switches to ROMs
- Added "proc -norom" - will omit the proc_rom pass
- Added "opt_ffinv" pass - push inverters through FFs
- Added "proc_rom" pass - convert switches to ROMs
- Added "proc -norom" option - will omit the proc_rom pass
- Added option "-no-rw-check" to synth passes
- Added "synth_ice40 -spram" automatic inference of SB_SPRAM256KA
- Added "synth_ice40 -spram" option for automatic inference of SB_SPRAM256KA
- Added options "-nobram" and "-nolutram" to synth_machxo2 pass
* Formal Verification
@ -27,6 +28,9 @@ Yosys 0.17 .. Yosys 0.17-dev
- Fixed size and signedness computation of functions used in ternary
expressions or case item expressions
* Verific support
- Proper file location for readmem commands
Yosys 0.16 .. Yosys 0.17
--------------------------
* New commands and options