mirror of https://github.com/YosysHQ/yosys.git
Merge remote-tracking branch 'origin/clifford/fix1091' into xc7mux_wip
This commit is contained in:
Eddie Hung
commit
9edde91c26
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@ -23,6 +23,7 @@
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USING_YOSYS_NAMESPACE
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PRIVATE_NAMESPACE_BEGIN
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#define COST_DMUX 90
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#define COST_MUX2 100
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#define COST_MUX4 220
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#define COST_MUX8 460
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@ -57,7 +58,9 @@ struct MuxcoverWorker
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bool use_mux8;
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bool use_mux16;
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bool nodecode;
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bool nopartial;
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int cost_dmux;
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int cost_mux2;
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int cost_mux4;
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int cost_mux8;
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@ -69,6 +72,8 @@ struct MuxcoverWorker
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use_mux8 = false;
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use_mux16 = false;
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nodecode = false;
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nopartial = false;
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cost_dmux = COST_DMUX;
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cost_mux2 = COST_MUX2;
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cost_mux4 = COST_MUX4;
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cost_mux8 = COST_MUX8;
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@ -133,13 +138,20 @@ struct MuxcoverWorker
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log(" Finished treeification: Found %d trees.\n", GetSize(tree_list));
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}
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bool follow_muxtree(SigBit &ret_bit, tree_t &tree, SigBit bit, const char *path)
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bool follow_muxtree(SigBit &ret_bit, tree_t &tree, SigBit bit, const char *path, bool first_layer = true)
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{
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if (*path) {
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if (tree.muxes.count(bit) == 0)
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return false;
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if (tree.muxes.count(bit) == 0) {
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if (first_layer || nopartial)
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return false;
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if (path[0] == 'S')
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ret_bit = State::Sx;
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else
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ret_bit = bit;
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return true;
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}
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char port_name[3] = {'\\', *path, 0};
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return follow_muxtree(ret_bit, tree, sigmap(tree.muxes.at(bit)->getPort(port_name)), path+1);
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return follow_muxtree(ret_bit, tree, sigmap(tree.muxes.at(bit)->getPort(port_name)), path+1, false);
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} else {
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ret_bit = bit;
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return true;
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@ -148,7 +160,7 @@ struct MuxcoverWorker
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int prepare_decode_mux(SigBit &A, SigBit B, SigBit sel, SigBit bit)
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{
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if (A == B)
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if (A == B || sel == State::Sx)
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return 0;
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tuple<SigBit, SigBit, SigBit> key(A, B, sel);
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@ -166,7 +178,10 @@ struct MuxcoverWorker
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if (std::get<2>(entry))
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return 0;
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return cost_mux2 / GetSize(std::get<1>(entry));
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if (A == State::Sx || B == State::Sx)
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return 0;
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return cost_dmux / GetSize(std::get<1>(entry));
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}
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void implement_decode_mux(SigBit ctrl_bit)
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@ -183,9 +198,32 @@ struct MuxcoverWorker
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implement_decode_mux(std::get<0>(key));
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implement_decode_mux(std::get<1>(key));
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module->addMuxGate(NEW_ID, std::get<0>(key), std::get<1>(key), std::get<2>(key), ctrl_bit);
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if (std::get<0>(key) == State::Sx) {
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module->addBufGate(NEW_ID, std::get<1>(key), ctrl_bit);
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} else if (std::get<1>(key) == State::Sx) {
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module->addBufGate(NEW_ID, std::get<0>(key), ctrl_bit);
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} else {
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module->addMuxGate(NEW_ID, std::get<0>(key), std::get<1>(key), std::get<2>(key), ctrl_bit);
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decode_mux_counter++;
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}
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std::get<2>(entry) = true;
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decode_mux_counter++;
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}
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void find_best_covers(tree_t &tree, const vector<SigBit> &bits)
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{
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for (auto bit : bits)
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find_best_cover(tree, bit);
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}
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int sum_best_covers(tree_t &tree, const vector<SigBit> &bits)
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{
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int sum = 0;
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for (auto bit : pool<SigBit>(bits.begin(), bits.end())) {
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int cost = tree.newmuxes.at(bit).cost;
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log_debug(" Best cost for %s: %d\n", log_signal(bit), cost);
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sum += cost;
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}
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return sum;
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}
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int find_best_cover(tree_t &tree, SigBit bit)
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@ -218,9 +256,13 @@ struct MuxcoverWorker
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mux.inputs.push_back(B);
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mux.selects.push_back(S1);
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find_best_covers(tree, mux.inputs);
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log_debug(" Decode cost for mux2 at %s: %d\n", log_signal(bit), mux.cost);
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mux.cost += cost_mux2;
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mux.cost += find_best_cover(tree, A);
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mux.cost += find_best_cover(tree, B);
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mux.cost += sum_best_covers(tree, mux.inputs);
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log_debug(" Cost of mux2 at %s: %d\n", log_signal(bit), mux.cost);
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best_mux = mux;
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}
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@ -256,13 +298,15 @@ struct MuxcoverWorker
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mux.selects.push_back(S1);
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mux.selects.push_back(T1);
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mux.cost += cost_mux4;
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mux.cost += find_best_cover(tree, A);
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mux.cost += find_best_cover(tree, B);
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mux.cost += find_best_cover(tree, C);
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mux.cost += find_best_cover(tree, D);
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find_best_covers(tree, mux.inputs);
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log_debug(" Decode cost for mux4 at %s: %d\n", log_signal(bit), mux.cost);
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if (best_mux.cost > mux.cost)
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mux.cost += cost_mux4;
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mux.cost += sum_best_covers(tree, mux.inputs);
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log_debug(" Cost of mux4 at %s: %d\n", log_signal(bit), mux.cost);
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if (best_mux.cost >= mux.cost)
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best_mux = mux;
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}
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}
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@ -319,17 +363,15 @@ struct MuxcoverWorker
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mux.selects.push_back(T1);
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mux.selects.push_back(U1);
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mux.cost += cost_mux8;
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mux.cost += find_best_cover(tree, A);
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mux.cost += find_best_cover(tree, B);
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mux.cost += find_best_cover(tree, C);
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mux.cost += find_best_cover(tree, D);
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mux.cost += find_best_cover(tree, E);
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mux.cost += find_best_cover(tree, F);
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mux.cost += find_best_cover(tree, G);
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mux.cost += find_best_cover(tree, H);
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find_best_covers(tree, mux.inputs);
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log_debug(" Decode cost for mux8 at %s: %d\n", log_signal(bit), mux.cost);
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if (best_mux.cost > mux.cost)
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mux.cost += cost_mux8;
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mux.cost += sum_best_covers(tree, mux.inputs);
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log_debug(" Cost of mux8 at %s: %d\n", log_signal(bit), mux.cost);
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if (best_mux.cost >= mux.cost)
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best_mux = mux;
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}
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}
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@ -423,25 +465,15 @@ struct MuxcoverWorker
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mux.selects.push_back(U1);
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mux.selects.push_back(V1);
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mux.cost += cost_mux16;
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mux.cost += find_best_cover(tree, A);
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mux.cost += find_best_cover(tree, B);
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mux.cost += find_best_cover(tree, C);
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mux.cost += find_best_cover(tree, D);
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mux.cost += find_best_cover(tree, E);
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mux.cost += find_best_cover(tree, F);
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mux.cost += find_best_cover(tree, G);
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mux.cost += find_best_cover(tree, H);
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mux.cost += find_best_cover(tree, I);
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mux.cost += find_best_cover(tree, J);
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mux.cost += find_best_cover(tree, K);
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mux.cost += find_best_cover(tree, L);
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mux.cost += find_best_cover(tree, M);
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mux.cost += find_best_cover(tree, N);
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mux.cost += find_best_cover(tree, O);
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mux.cost += find_best_cover(tree, P);
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find_best_covers(tree, mux.inputs);
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log_debug(" Decode cost for mux16 at %s: %d\n", log_signal(bit), mux.cost);
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if (best_mux.cost > mux.cost)
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mux.cost += cost_mux16;
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mux.cost += sum_best_covers(tree, mux.inputs);
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log_debug(" Cost of mux16 at %s: %d\n", log_signal(bit), mux.cost);
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if (best_mux.cost >= mux.cost)
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best_mux = mux;
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}
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}
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@ -537,6 +569,7 @@ struct MuxcoverWorker
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void treecover(tree_t &tree)
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{
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int count_muxes_by_type[4] = {0, 0, 0, 0};
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log_debug(" Searching for best cover for tree at %s.\n", log_signal(tree.root));
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find_best_cover(tree, tree.root);
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implement_best_cover(tree, tree.root, count_muxes_by_type);
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log(" Replaced tree at %s: %d MUX2, %d MUX4, %d MUX8, %d MUX16\n", log_signal(tree.root),
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@ -553,12 +586,13 @@ struct MuxcoverWorker
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log(" Covering trees:\n");
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// pre-fill cache of decoder muxes
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if (!nodecode)
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if (!nodecode) {
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log_debug(" Populating cache of decoder muxes.\n");
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for (auto &tree : tree_list) {
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find_best_cover(tree, tree.root);
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tree.newmuxes.clear();
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}
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}
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for (auto &tree : tree_list)
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treecover(tree);
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@ -584,11 +618,19 @@ struct MuxcoverPass : public Pass {
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log(" Default costs: $_MUX_ = %d, $_MUX4_ = %d,\n", COST_MUX2, COST_MUX4);
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log(" $_MUX8_ = %d, $_MUX16_ = %d\n", COST_MUX8, COST_MUX16);
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log("\n");
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log(" -dmux=cost\n");
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log(" Use the specified cost for $_MUX_ cells used in decoders.\n");
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log(" Default cost: %d\n", COST_DMUX);
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log("\n");
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log(" -nodecode\n");
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log(" Do not insert decoder logic. This reduces the number of possible\n");
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log(" substitutions, but guarantees that the resulting circuit is not\n");
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log(" less efficient than the original circuit.\n");
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log("\n");
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log(" -nopartial\n");
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log(" Do not consider mappings that use $_MUX<N>_ to select from less\n");
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log(" than <N> different signals.\n");
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log("\n");
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}
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void execute(std::vector<std::string> args, RTLIL::Design *design) YS_OVERRIDE
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{
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@ -598,6 +640,8 @@ struct MuxcoverPass : public Pass {
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bool use_mux8 = false;
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bool use_mux16 = false;
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bool nodecode = false;
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bool nopartial = false;
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int cost_dmux = COST_DMUX;
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int cost_mux4 = COST_MUX4;
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int cost_mux8 = COST_MUX8;
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int cost_mux16 = COST_MUX16;
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@ -630,10 +674,18 @@ struct MuxcoverPass : public Pass {
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}
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continue;
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}
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if (arg.size() >= 6 && arg.substr(0,6) == "-dmux=") {
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cost_dmux = atoi(arg.substr(6).c_str());
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continue;
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}
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if (arg == "-nodecode") {
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nodecode = true;
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continue;
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}
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if (arg == "-nopartial") {
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nopartial = true;
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continue;
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}
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break;
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}
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extra_args(args, argidx, design);
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@ -650,10 +702,12 @@ struct MuxcoverPass : public Pass {
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worker.use_mux4 = use_mux4;
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worker.use_mux8 = use_mux8;
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worker.use_mux16 = use_mux16;
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worker.cost_dmux = cost_dmux;
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worker.cost_mux4 = cost_mux4;
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worker.cost_mux8 = cost_mux8;
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worker.cost_mux16 = cost_mux16;
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worker.nodecode = nodecode;
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worker.nopartial = nopartial;
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worker.run();
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}
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}
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|
|
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@ -13,7 +13,7 @@ read_verilog -formal <<EOT
|
|||
EOT
|
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|
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|
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## Examle usage for "pmuxtree" and "muxcover"
|
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## Example usage for "pmuxtree" and "muxcover"
|
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|
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proc
|
||||
pmuxtree
|
||||
|
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@ -49,3 +49,142 @@ hierarchy -top equiv
|
|||
equiv_simple -undef
|
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equiv_status -assert
|
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|
||||
## Partial matching MUX4
|
||||
|
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design -reset
|
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read_verilog -formal <<EOT
|
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module mux_if_bal_3_1 #(parameter N=3, parameter W=1) (input [N*W-1:0] i, input [$clog2(N)-1:0] s, output reg [W-1:0] o);
|
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always @* begin
|
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o <= {{W{{1'bx}}}};
|
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if (s[0] == 1'b0)
|
||||
if (s[1] == 1'b0)
|
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o <= i[0*W+:W];
|
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else
|
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o <= i[1*W+:W];
|
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else
|
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if (s[1] == 1'b0)
|
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o <= i[2*W+:W];
|
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end
|
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endmodule
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EOT
|
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prep
|
||||
design -save gold
|
||||
|
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techmap
|
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muxcover -mux4=150
|
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select -assert-count 0 t:$_MUX_
|
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select -assert-count 1 t:$_MUX4_
|
||||
select -assert-count 0 t:$_MUX8_
|
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select -assert-count 0 t:$_MUX16_
|
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techmap -map +/simcells.v t:$_MUX4_
|
||||
design -stash gate
|
||||
|
||||
design -import gold -as gold
|
||||
design -import gate -as gate
|
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|
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miter -equiv -flatten -make_assert -make_outputs gold gate miter
|
||||
sat -verify -prove-asserts -show-ports miter
|
||||
|
||||
## Partial matching MUX8
|
||||
|
||||
design -reset
|
||||
read_verilog -formal <<EOT
|
||||
module mux_if_bal_5_1 #(parameter N=5, parameter W=1) (input [N*W-1:0] i, input [$clog2(N)-1:0] s, output reg [W-1:0] o);
|
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always @* begin
|
||||
o <= {{W{{1'bx}}}};
|
||||
if (s[0] == 1'b0)
|
||||
if (s[1] == 1'b0)
|
||||
if (s[2] == 1'b0)
|
||||
o <= i[0*W+:W];
|
||||
else
|
||||
o <= i[1*W+:W];
|
||||
else
|
||||
if (s[2] == 1'b0)
|
||||
o <= i[2*W+:W];
|
||||
else
|
||||
o <= i[3*W+:W];
|
||||
else
|
||||
if (s[1] == 1'b0)
|
||||
if (s[2] == 1'b0)
|
||||
o <= i[4*W+:W];
|
||||
end
|
||||
endmodule
|
||||
EOT
|
||||
prep
|
||||
design -save gold
|
||||
|
||||
techmap
|
||||
muxcover -mux4=150 -mux8=200
|
||||
clean
|
||||
opt_expr -mux_bool
|
||||
select -assert-count 0 t:$_MUX_
|
||||
select -assert-count 0 t:$_MUX4_
|
||||
select -assert-count 1 t:$_MUX8_
|
||||
select -assert-count 0 t:$_MUX16_
|
||||
techmap -map +/simcells.v t:$_MUX8_
|
||||
design -stash gate
|
||||
|
||||
design -import gold -as gold
|
||||
design -import gate -as gate
|
||||
|
||||
miter -equiv -flatten -make_assert -make_outputs gold gate miter
|
||||
sat -verify -prove-asserts -show-ports miter
|
||||
|
||||
## Partial matching MUX16
|
||||
|
||||
design -reset
|
||||
read_verilog -formal <<EOT
|
||||
module mux_if_bal_9_1 #(parameter N=9, parameter W=1) (input [N*W-1:0] i, input [$clog2(N)-1:0] s, output reg [W-1:0] o);
|
||||
always @* begin
|
||||
o <= {{W{{1'bx}}}};
|
||||
if (s[0] == 1'b0)
|
||||
if (s[1] == 1'b0)
|
||||
if (s[2] == 1'b0)
|
||||
if (s[3] == 1'b0)
|
||||
o <= i[0*W+:W];
|
||||
else
|
||||
o <= i[1*W+:W];
|
||||
else
|
||||
if (s[3] == 1'b0)
|
||||
o <= i[2*W+:W];
|
||||
else
|
||||
o <= i[3*W+:W];
|
||||
else
|
||||
if (s[2] == 1'b0)
|
||||
if (s[3] == 1'b0)
|
||||
o <= i[4*W+:W];
|
||||
else
|
||||
o <= i[5*W+:W];
|
||||
else
|
||||
if (s[3] == 1'b0)
|
||||
o <= i[6*W+:W];
|
||||
else
|
||||
o <= i[7*W+:W];
|
||||
else
|
||||
if (s[1] == 1'b0)
|
||||
if (s[2] == 1'b0)
|
||||
if (s[3] == 1'b0)
|
||||
o <= i[8*W+:W];
|
||||
end
|
||||
endmodule
|
||||
EOT
|
||||
prep
|
||||
design -save gold
|
||||
|
||||
techmap
|
||||
muxcover -mux4=150 -mux8=200 -mux16=250
|
||||
clean
|
||||
opt_expr -mux_bool
|
||||
select -assert-count 0 t:$_MUX_
|
||||
select -assert-count 0 t:$_MUX4_
|
||||
select -assert-count 0 t:$_MUX8_
|
||||
select -assert-count 1 t:$_MUX16_
|
||||
techmap -map +/simcells.v t:$_MUX16_
|
||||
design -stash gate
|
||||
|
||||
design -import gold -as gold
|
||||
design -import gate -as gate
|
||||
|
||||
miter -equiv -flatten -make_assert -make_outputs gold gate miter
|
||||
sat -verify -prove-asserts -show-ports miter
|
||||
|
||||
|
|
|
|||
Loading…
Reference in New Issue