riscv
/
yosys
mirror of https://github.com/YosysHQ/yosys.git
1
0
Fork 0
Code Issues Projects Releases Wiki Activity

Fixed handling of constant-true branches in proc_clean

This commit is contained in:
Clifford Wolf 2014-08-12 17:35:22 +02:00
parent 1dd8252169
commit 9d353fc543
2 changed files with 3 additions and 2 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

3
passes/proc/proc_clean.cc
View File

@ -59,7 +59,8 @@ void proc_clean_switch(RTLIL::SwitchRule *sw, RTLIL::CaseRule *parent, bool &did
sw->signal = RTLIL::SigSpec(); sw->signal = RTLIL::SigSpec();
} }
if (sw->cases.size() == 1 && (sw->signal.size() == 0 || sw->cases[0]->compare.empty())) if (parent->switches.front() == sw && sw->cases.size() == 1 &&
(sw->signal.size() == 0 || sw->cases[0]->compare.empty()))
{ {
did_something = true; did_something = true;
for (auto &action : sw->cases[0]->actions) for (auto &action : sw->cases[0]->actions)

2
passes/proc/proc_rmdead.cc
View File

@ -31,7 +31,7 @@ static void proc_rmdead(RTLIL::SwitchRule *sw, int &counter)
for (size_t i = 0; i < sw->cases.size(); i++) for (size_t i = 0; i < sw->cases.size(); i++)
{ {
bool is_default = sw->cases[i]->compare.size() == 0 && !pool.empty(); bool is_default = SIZE(sw->cases[i]->compare) == 0 && (!pool.empty() || SIZE(sw->signal) == 0);
for (size_t j = 0; j < sw->cases[i]->compare.size(); j++) { for (size_t j = 0; j < sw->cases[i]->compare.size(); j++) {
RTLIL::SigSpec sig = sw->cases[i]->compare[j]; RTLIL::SigSpec sig = sw->cases[i]->compare[j];