mirror of https://github.com/YosysHQ/yosys.git
Improve simplec back-end
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parent
628daab277
commit
9c397ea78b
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@ -34,6 +34,7 @@ struct HierDirtyFlags
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HierDirtyFlags *parent;
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pool<SigBit> dirty_bits;
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pool<Cell*> dirty_cells;
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pool<SigBit> sticky_dirty_bits;
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dict<IdString, HierDirtyFlags*> children;
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HierDirtyFlags(Module *module, IdString hiername, HierDirtyFlags *parent) : dirty(0), module(module), hiername(hiername), parent(parent)
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@ -56,6 +57,7 @@ struct HierDirtyFlags
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return;
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dirty_bits.insert(bit);
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sticky_dirty_bits.insert(bit);
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HierDirtyFlags *p = this;
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while (p != nullptr) {
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@ -573,6 +575,40 @@ struct SimplecWorker
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}
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}
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void eval_sticky_dirty(HierDirtyFlags *work, const string &prefix, const string &log_prefix)
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{
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Module *mod = work->module;
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for (Wire *w : mod->wires())
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for (SigBit bit : SigSpec(w))
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{
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SigBit canonical_bit = sigmaps.at(mod)(bit);
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if (canonical_bit == bit)
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continue;
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if (work->sticky_dirty_bits.count(canonical_bit) == 0)
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continue;
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log_assert(bit.wire && canonical_bit.wire);
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funct_declarations.push_back(stringf(" %s(&%s, %s(&%s));",
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util_set_bit(bit.wire->width, bit.offset).c_str(),
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(prefix + cid(bit.wire->name)).c_str(),
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util_get_bit(canonical_bit.wire->width, canonical_bit.offset).c_str(),
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(prefix + cid(canonical_bit.wire->name)).c_str()));
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if (verbose)
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log(" Propagating alias %s.%s[%d] -> %s.%s[%d].\n",
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log_prefix.c_str(), log_id(canonical_bit.wire), canonical_bit.offset,
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log_prefix.c_str(), log_id(bit.wire), bit.offset);
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}
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work->sticky_dirty_bits.clear();
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for (auto &child : work->children)
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eval_sticky_dirty(child.second, prefix + cid(child.first) + ".", log_prefix + "." + cid(child.first));
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}
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void make_func(HierDirtyFlags *work, const string &func_name)
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{
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log("Generating function %s():\n", func_name.c_str());
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@ -584,6 +620,7 @@ struct SimplecWorker
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funct_declarations.push_back(stringf("static void %s(struct %s_state_t *state)", func_name.c_str(), cid(work->module->name).c_str()));
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funct_declarations.push_back("{");
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eval_dirty(work, "state->", log_id(work->module->name), "", "");
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eval_sticky_dirty(work, "state->", log_id(work->module->name));
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funct_declarations.push_back("}");
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log(" Activated %d cells (%d activated more than once).\n", GetSize(activated_cells), GetSize(reactivated_cells));
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@ -14,7 +14,7 @@ uint32_t xorshift32()
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int main()
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{
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struct test_state_t state;
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uint32_t a, b, c, x, y, z;
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uint32_t a, b, c, x, y, z, w;
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for (int i = 0; i < 10; i++)
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{
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@ -25,6 +25,7 @@ int main()
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x = (a & b) | c;
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y = a & (b | c);
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z = a ^ b ^ c;
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w = z;
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state.a.value_7_0 = a;
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state.a.value_15_8 = a >> 8;
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@ -61,6 +62,12 @@ int main()
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uut_z |= (uint32_t)state.z.value_23_16 << 16;
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uut_z |= (uint32_t)state.z.value_31_24 << 24;
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uint32_t uut_w = 0;
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uut_w |= (uint32_t)state.w.value_7_0;
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uut_w |= (uint32_t)state.w.value_15_8 << 8;
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uut_w |= (uint32_t)state.w.value_23_16 << 16;
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uut_w |= (uint32_t)state.w.value_31_24 << 24;
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printf("---\n");
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printf("A: 0x%08x\n", a);
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printf("B: 0x%08x\n", b);
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@ -68,10 +75,12 @@ int main()
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printf("X: 0x%08x 0x%08x\n", x, uut_x);
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printf("Y: 0x%08x 0x%08x\n", y, uut_y);
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printf("Z: 0x%08x 0x%08x\n", z, uut_z);
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printf("W: 0x%08x 0x%08x\n", w, uut_w);
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assert(x == uut_x);
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assert(y == uut_y);
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assert(z == uut_z);
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assert(w == uut_w);
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}
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return 0;
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@ -1,7 +1,7 @@
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module test(input [31:0] a, b, c, output [31:0] x, y, z);
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module test(input [31:0] a, b, c, output [31:0] x, y, z, w);
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unit_x unit_x_inst (.a(a), .b(b), .c(c), .x(x));
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unit_y unit_y_inst (.a(a), .b(b), .c(c), .y(y));
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assign z = a ^ b ^ c;
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assign z = a ^ b ^ c, w = z;
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endmodule
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module unit_x(input [31:0] a, b, c, output [31:0] x);
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