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Merge pull request #3818 from nakengelhardt/nak/verific_import_mem_access_src_loc 

verific: import src attribute on $memrd/$memwr cells
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Miodrag Milanović 2023-06-24 10:42:45 +02:00 committed by GitHub
parent f9257d3192 21686f0d9d
commit 9ba7170919
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1 changed files with 2 additions and 0 deletions
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frontends/verific/verific.cc
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@ -1649,6 +1649,7 @@ void VerificImporter::import_netlist(RTLIL::Design *design, Netlist *nl, std::ma
cell->parameters[ID::TRANSPARENT] = false;
cell->parameters[ID::ABITS] = GetSize(addr);
cell->parameters[ID::WIDTH] = GetSize(data);
import_attributes(cell->attributes, inst);
cell->setPort(ID::CLK, RTLIL::State::Sx);
cell->setPort(ID::EN, RTLIL::State::Sx);
cell->setPort(ID::ADDR, addr);
@ -1678,6 +1679,7 @@ void VerificImporter::import_netlist(RTLIL::Design *design, Netlist *nl, std::ma
cell->parameters[ID::PRIORITY] = 0;
cell->parameters[ID::ABITS] = GetSize(addr);
cell->parameters[ID::WIDTH] = GetSize(data);
import_attributes(cell->attributes, inst);
cell->setPort(ID::EN, RTLIL::SigSpec(net_map_at(inst->GetControl())).repeat(GetSize(data)));
cell->setPort(ID::CLK, RTLIL::State::S0);
cell->setPort(ID::ADDR, addr);