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Replace opt_rmdff with opt_dff.

This commit is contained in:
Marcelina Kościelnicka 2020-07-20 23:19:51 +02:00
parent c39ebe6ae0
commit 9a4f420b4b
18 changed files with 75 additions and 73 deletions
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2
CHANGELOG
View File

@ -62,7 +62,6 @@ Yosys 0.9 .. Yosys 0.9-dev
- Improved support of $readmem[hb] Memory Content File inclusion
- Added "opt_lut_ins" pass
- Added "logger" pass
- Removed "dffsr2dff" (use opt_rmdff instead)
- Added "design -delete"
- Added "select -unset"
- Use YosysHQ/abc instead of upstream berkeley-abc/abc
@ -70,6 +69,7 @@ Yosys 0.9 .. Yosys 0.9-dev
- Added $adffe, $dffsre, $sdff, $sdffe, $sdffce, $adlatch cells
- Added "dfflegalize" pass
- Added "_TECHMAP_CELLNAME_" parameter for "techmap" pass
- Merged "dffsr2dff", "opt_rmdff", "dff2dffe", "dff2dffs", "peepopt.dffmux" passes into a new "opt_dff" pass
Yosys 0.8 .. Yosys 0.9
----------------------

24
passes/opt/opt.cc
View File

@ -45,7 +45,7 @@ struct OptPass : public Pass {
log(" opt_reduce [-fine] [-full]\n");
log(" opt_merge [-share_all]\n");
log(" opt_share (-full only)\n");
log(" opt_rmdff [-keepdc] [-sat] (except when called with -noff)\n");
log(" opt_dff [-nodffe] [-nosdff] [-keepdc] [-sat] (except when called with -noff)\n");
log(" opt_clean [-purge]\n");
log(" opt_expr [-mux_undef] [-mux_bool] [-undriven] [-noclkinv] [-fine] [-full] [-keepdc]\n");
log(" while <changed design>\n");
@ -55,9 +55,9 @@ struct OptPass : public Pass {
log(" do\n");
log(" opt_expr [-mux_undef] [-mux_bool] [-undriven] [-noclkinv] [-fine] [-full] [-keepdc]\n");
log(" opt_merge [-share_all]\n");
log(" opt_rmdff [-keepdc] [-sat] (except when called with -noff)\n");
log(" opt_dff [-nodffe] [-nosdff] [-keepdc] [-sat] (except when called with -noff)\n");
log(" opt_clean [-purge]\n");
log(" while <changed design in opt_rmdff>\n");
log(" while <changed design in opt_dff>\n");
log("\n");
log("Note: Options in square brackets (such as [-keepdc]) are passed through to\n");
log("the opt_* commands when given to 'opt'.\n");
@ -70,7 +70,7 @@ struct OptPass : public Pass {
std::string opt_expr_args;
std::string opt_reduce_args;
std::string opt_merge_args;
std::string opt_rmdff_args;
std::string opt_dff_args;
bool opt_share = false;
bool fast_mode = false;
bool noff_mode = false;
@ -113,11 +113,19 @@ struct OptPass : public Pass {
}
if (args[argidx] == "-keepdc") {
opt_expr_args += " -keepdc";
opt_rmdff_args += " -keepdc";
opt_dff_args += " -keepdc";
continue;
}
if (args[argidx] == "-nodffe") {
opt_dff_args += " -nodffe";
continue;
}
if (args[argidx] == "-nosdff") {
opt_dff_args += " -nosdff";
continue;
}
if (args[argidx] == "-sat") {
opt_rmdff_args += " -sat";
opt_dff_args += " -sat";
continue;
}
if (args[argidx] == "-share_all") {
@ -143,7 +151,7 @@ struct OptPass : public Pass {
Pass::call(design, "opt_merge" + opt_merge_args);
design->scratchpad_unset("opt.did_something");
if (!noff_mode)
Pass::call(design, "opt_rmdff" + opt_rmdff_args);
Pass::call(design, "opt_dff" + opt_dff_args);
if (design->scratchpad_get_bool("opt.did_something") == false)
break;
Pass::call(design, "opt_clean" + opt_clean_args);
@ -163,7 +171,7 @@ struct OptPass : public Pass {
if (opt_share)
Pass::call(design, "opt_share");
if (!noff_mode)
Pass::call(design, "opt_rmdff" + opt_rmdff_args);
Pass::call(design, "opt_dff" + opt_dff_args);
Pass::call(design, "opt_clean" + opt_clean_args);
Pass::call(design, "opt_expr" + opt_expr_args);
if (design->scratchpad_get_bool("opt.did_something") == false)

2
passes/techmap/abc9.cc
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@ -295,7 +295,7 @@ struct Abc9Pass : public ScriptPass
run("proc");
run("wbflip");
run("techmap -wb -map %$abc9 -map +/techmap.v A:abc9_flop");
run("opt");
run("opt -nodffe -nosdff");
if (dff_mode || help_mode) {
if (!help_mode)
active_design->scratchpad_unset("abc9_ops.prep_dff_submod.did_something");

6
techlibs/common/synth.cc
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@ -220,6 +220,9 @@ struct SynthPass : public ScriptPass
run("opt_expr");
run("opt_clean");
run("check");
run("opt -nodffe -nosdff");
if (!nofsm)
run("fsm" + fsm_opts, " (unless -nofsm)");
run("opt");
run("wreduce");
run("peepopt");
@ -233,9 +236,6 @@ struct SynthPass : public ScriptPass
if (!noshare)
run("share", " (unless -noshare)");
run("opt");
if (!nofsm)
run("fsm" + fsm_opts, " (unless -nofsm)");
run("opt -fast");
run("memory -nomap" + memory_opts);
run("opt_clean");
}

26
techlibs/ecp5/synth_ecp5.cc
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@ -257,6 +257,8 @@ struct SynthEcp5Pass : public ScriptPass
run("opt_expr");
run("opt_clean");
run("check");
run("opt -nodffe -nosdff");
run("fsm");
run("opt");
run("wreduce");
run("peepopt");
@ -271,8 +273,6 @@ struct SynthEcp5Pass : public ScriptPass
}
run("alumacc");
run("opt");
run("fsm");
run("opt -fast");
run("memory -nomap");
run("opt_clean");
}
@ -311,16 +311,20 @@ struct SynthEcp5Pass : public ScriptPass
if (check_label("map_ffs"))
{
run("dff2dffs");
run("opt_clean");
if (!nodffe)
run("dff2dffe -direct-match $_DFF_* -direct-match $_SDFF_*");
if (help_mode)
run("dfflegalize -cell $_DFF_?_ 01 -cell $_DFFE_??_ 01 -cell $_DFF_?P?_ r -cell $_DFFE_?P??_ r -cell $_SDFF_?P?_ r -cell $_SDFFE_?P??_ r -cell $_DLATCH_?_ x [-cell $_DFFSR_?PP_ x]", "($_DFFSR_*_ only if -asyncprld)");
else if (asyncprld)
run("dfflegalize -cell $_DFF_?_ 01 -cell $_DFFE_??_ 01 -cell $_DFF_?P?_ r -cell $_DFFE_?P??_ r -cell $_SDFF_?P?_ r -cell $_SDFFE_?P??_ r -cell $_DLATCH_?_ x -cell $_DFFSR_?PP_ x");
else
run("dfflegalize -cell $_DFF_?_ 01 -cell $_DFFE_??_ 01 -cell $_DFF_?P?_ r -cell $_DFFE_?P??_ r -cell $_SDFF_?P?_ r -cell $_SDFFE_?P??_ r -cell $_DLATCH_?_ x");
std::string dfflegalize_args = " -cell $_DFF_?_ 01 -cell $_DFF_?P?_ r -cell $_SDFF_?P?_ r";
if (help_mode) {
dfflegalize_args += " [-cell $_DFFE_??_ 01 -cell $_DFFE_?P??_ r -cell $_SDFFE_?P??_ r]";
} else if (!nodffe) {
dfflegalize_args += " -cell $_DFFE_??_ 01 -cell $_DFFE_?P??_ r -cell $_SDFFE_?P??_ r";
}
dfflegalize_args += " -cell $_DLATCH_?_ x";
if (help_mode) {
dfflegalize_args += " [-cell $_DFFSR_?PP_ x]";
} else if (asyncprld) {
dfflegalize_args += " -cell $_DFFSR_?PP_ x";
}
run("dfflegalize" + dfflegalize_args, "($_DFFSR_*_ only if -asyncprld, $_*DFFE_* only if not -nodffe)");
if ((abc9 && dff) || help_mode)
run("zinit -all w:* t:$_DFF_?_ t:$_DFFE_??_ t:$_SDFF*", "(only if -abc9 and -dff");
run(stringf("techmap -D NO_LUT %s -map +/ecp5/cells_map.v", help_mode ? "[-D ASYNC_PRLD]" : (asyncprld ? "-D ASYNC_PRLD" : "")));

6
techlibs/gowin/synth_gowin.cc
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@ -219,10 +219,10 @@ struct SynthGowinPass : public ScriptPass
if (check_label("map_ffs"))
{
run("dff2dffs -match-init");
run("opt_clean");
if (!nodffe)
run("dff2dffe -direct-match $_DFF_* -direct-match $_SDFF_*");
if (nodffe)
run("dfflegalize -cell $_DFF_?_ 0 -cell $_SDFF_?P?_ r -cell $_DFF_?P?_ r");
else
run("dfflegalize -cell $_DFF_?_ 0 -cell $_DFFE_?P_ 0 -cell $_SDFF_?P?_ r -cell $_SDFFE_?P?P_ r -cell $_DFF_?P?_ r -cell $_DFFE_?P?P_ r");
run("techmap -map +/gowin/cells_map.v");
run("opt_expr -mux_undef");

4
techlibs/ice40/synth_ice40.cc
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@ -292,11 +292,9 @@ struct SynthIce40Pass : public ScriptPass
run("opt_expr");
run("opt_clean");
run("check");
run("opt");
run("opt -nodffe -nosdff");
run("fsm");
run("opt");
run("opt_dff");
run("opt");
run("wreduce");
run("peepopt");
run("opt_clean");

2
techlibs/intel/synth_intel.cc
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@ -202,8 +202,6 @@ struct SynthIntelPass : public ScriptPass {
run("opt -fast -mux_undef -undriven -fine -full");
run("memory_map");
run("opt -undriven -fine");
run("dff2dffe -direct-match $_DFF_*");
run("opt -fine");
run("techmap -map +/techmap.v");
run("opt -full");
run("clean -purge");

5
techlibs/intel_alm/synth_intel_alm.cc
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@ -200,6 +200,8 @@ struct SynthIntelALMPass : public ScriptPass {
run("opt_expr");
run("opt_clean");
run("check");
run("opt -nodffe -nosdff");
run("fsm");
run("opt");
run("wreduce");
run("peepopt");
@ -227,8 +229,6 @@ struct SynthIntelALMPass : public ScriptPass {
run("alumacc");
run("techmap -map +/intel_alm/common/arith_alm_map.v -map +/intel_alm/common/dsp_map.v");
run("opt");
run("fsm");
run("opt -fast");
run("memory -nomap");
run("opt_clean");
}
@ -250,7 +250,6 @@ struct SynthIntelALMPass : public ScriptPass {
if (check_label("map_ffs")) {
run("techmap");
run("dff2dffe");
run("dfflegalize -cell $_DFFE_PN0P_ 0 -cell $_SDFFCE_PP0P_ 0");
run("techmap -map +/intel_alm/common/dff_map.v");
run("opt -full -undriven -mux_undef");

4
techlibs/xilinx/synth_xilinx.cc
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@ -357,11 +357,9 @@ struct SynthXilinxPass : public ScriptPass
run("opt_expr");
run("opt_clean");
run("check");
run("opt");
run("opt -nodffe -nosdff");
run("fsm");
run("opt");
run("opt_dff");
run("opt");
if (help_mode)
run("wreduce [-keepdc]", "(option for '-widemux')");
else

3
tests/arch/anlogic/dffs.ys
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@ -15,6 +15,5 @@ proc
equiv_opt -assert -map +/anlogic/cells_sim.v synth_anlogic # equivalency check
design -load postopt # load the post-opt design (otherwise equiv_opt loads the pre-opt design)
cd dffe # Constrain all select calls below inside the top module
select -assert-count 1 t:AL_MAP_LUT3
select -assert-count 1 t:AL_MAP_SEQ
select -assert-none t:AL_MAP_LUT3 t:AL_MAP_SEQ %% t:* %D
select -assert-none t:AL_MAP_SEQ %% t:* %D

6
tests/arch/ecp5/fsm.ys
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@ -10,8 +10,8 @@ sat -verify -prove-asserts -show-public -set-at 1 in_reset 1 -seq 20 -prove-skip
design -load postopt # load the post-opt design (otherwise equiv_opt loads the pre-opt design)
cd fsm # Constrain all select calls below inside the top module
select -assert-count 1 t:L6MUX21
select -assert-count 15 t:LUT4
select -assert-count 6 t:PFUMX
select -assert-max 1 t:L6MUX21
select -assert-max 16 t:LUT4
select -assert-max 7 t:PFUMX
select -assert-count 6 t:TRELLIS_FF
select -assert-none t:L6MUX21 t:LUT4 t:PFUMX t:TRELLIS_FF %% t:* %D

6
tests/arch/efinix/adffs.ys
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@ -32,9 +32,8 @@ design -load postopt # load the post-opt design (otherwise equiv_opt loads the p
cd dffs # Constrain all select calls below inside the top module
select -assert-count 1 t:EFX_FF
select -assert-count 1 t:EFX_GBUFCE
select -assert-count 1 t:EFX_LUT4
select -assert-none t:EFX_FF t:EFX_GBUFCE t:EFX_LUT4 %% t:* %D
select -assert-none t:EFX_FF t:EFX_GBUFCE %% t:* %D
design -load read
@ -45,6 +44,5 @@ design -load postopt # load the post-opt design (otherwise equiv_opt loads the p
cd ndffnr # Constrain all select calls below inside the top module
select -assert-count 1 t:EFX_FF
select -assert-count 1 t:EFX_GBUFCE
select -assert-count 1 t:EFX_LUT4
select -assert-none t:EFX_FF t:EFX_GBUFCE t:EFX_LUT4 %% t:* %D
select -assert-none t:EFX_FF t:EFX_GBUFCE %% t:* %D

3
tests/arch/efinix/dffs.ys
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@ -19,6 +19,5 @@ design -load postopt # load the post-opt design (otherwise equiv_opt loads the p
cd dffe # Constrain all select calls below inside the top module
select -assert-count 1 t:EFX_FF
select -assert-count 1 t:EFX_GBUFCE
select -assert-count 1 t:EFX_LUT4
select -assert-none t:EFX_FF t:EFX_GBUFCE t:EFX_LUT4 %% t:* %D
select -assert-none t:EFX_FF t:EFX_GBUFCE %% t:* %D

19
tests/arch/gowin/init.ys
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@ -45,24 +45,25 @@ flatten
synth_gowin -run coarse:
# check the flops mapped as expected
select -assert-count 1 t:DFF
select -assert-count 2 t:DFF
select -assert-count 1 t:DFFC
select -assert-count 1 t:DFFCE
select -assert-count 1 t:DFFE
select -assert-count 1 t:DFFN
select -assert-count 0 t:DFFE
select -assert-count 2 t:DFFN
select -assert-count 1 t:DFFNC
select -assert-count 1 t:DFFNCE
select -assert-count 1 t:DFFNE
select -assert-count 0 t:DFFNE
select -assert-count 1 t:DFFNP
select -assert-count 1 t:DFFNPE
select -assert-count 0 t:DFFNR
select -assert-count 0 t:DFFNRE
select -assert-count 2 t:DFFNS
select -assert-count 2 t:DFFNSE
select -assert-count 3 t:DFFNS
select -assert-count 1 t:DFFNSE
select -assert-count 1 t:DFFP
select -assert-count 1 t:DFFPE
select -assert-count 0 t:DFFR
select -assert-count 0 t:DFFRE
select -assert-count 2 t:DFFS
select -assert-count 2 t:DFFSE
select -assert-count 12 t:LUT2
select -assert-count 3 t:DFFS
select -assert-count 1 t:DFFSE
select -assert-count 4 t:LUT2
select -assert-count 4 t:LUT4

10
tests/arch/intel_alm/adffs.ys
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@ -77,10 +77,9 @@ equiv_opt -async2sync -assert -map +/intel_alm/common/alm_sim.v -map +/intel_alm
design -load postopt # load the post-opt design (otherwise equiv_opt loads the pre-opt design)
cd ndffnr # Constrain all select calls below inside the top module
select -assert-count 1 t:MISTRAL_FF
select -assert-count 1 t:MISTRAL_NOT
select -assert-count 1 t:MISTRAL_ALUT2
select -assert-count 2 t:MISTRAL_NOT
select -assert-none t:MISTRAL_FF t:MISTRAL_NOT t:MISTRAL_ALUT2 %% t:* %D
select -assert-none t:MISTRAL_FF t:MISTRAL_NOT %% t:* %D
design -load read
@ -90,7 +89,6 @@ equiv_opt -async2sync -assert -map +/intel_alm/common/alm_sim.v -map +/intel_alm
design -load postopt # load the post-opt design (otherwise equiv_opt loads the pre-opt design)
cd ndffnr # Constrain all select calls below inside the top module
select -assert-count 1 t:MISTRAL_FF
select -assert-count 1 t:MISTRAL_NOT
select -assert-count 1 t:MISTRAL_ALUT2
select -assert-count 2 t:MISTRAL_NOT
select -assert-none t:MISTRAL_FF t:MISTRAL_NOT t:MISTRAL_ALUT2 %% t:* %D
select -assert-none t:MISTRAL_FF t:MISTRAL_NOT %% t:* %D

12
tests/arch/intel_alm/fsm.ys
View File

@ -12,12 +12,13 @@ design -load postopt # load the post-opt design (otherwise equiv_opt loads the p
cd fsm # Constrain all select calls below inside the top module
select -assert-count 6 t:MISTRAL_FF
select -assert-max 1 t:MISTRAL_NOT
select -assert-max 2 t:MISTRAL_ALUT2 # Clang returns 2, GCC returns 1
select -assert-count 1 t:MISTRAL_ALUT3
select -assert-max 1 t:MISTRAL_ALUT4 # Clang returns 0, GCC returns 1
select -assert-max 1 t:MISTRAL_ALUT3
select -assert-max 2 t:MISTRAL_ALUT4 # Clang returns 0, GCC returns 1
select -assert-max 6 t:MISTRAL_ALUT5 # Clang returns 5, GCC returns 4
select -assert-max 2 t:MISTRAL_ALUT6 # Clang returns 1, GCC returns 2
select -assert-none t:MISTRAL_FF t:MISTRAL_ALUT2 t:MISTRAL_ALUT3 t:MISTRAL_ALUT4 t:MISTRAL_ALUT5 t:MISTRAL_ALUT6 %% t:* %D
select -assert-none t:MISTRAL_FF t:MISTRAL_NOT t:MISTRAL_ALUT2 t:MISTRAL_ALUT3 t:MISTRAL_ALUT4 t:MISTRAL_ALUT5 t:MISTRAL_ALUT6 %% t:* %D
design -reset
read_verilog ../common/fsm.v
@ -34,9 +35,10 @@ design -load postopt # load the post-opt design (otherwise equiv_opt loads the p
cd fsm # Constrain all select calls below inside the top module
select -assert-count 6 t:MISTRAL_FF
select -assert-max 1 t:MISTRAL_NOT
select -assert-max 2 t:MISTRAL_ALUT2 # Clang returns 2, GCC returns 1
select -assert-max 2 t:MISTRAL_ALUT3 # Clang returns 2, GCC returns 1
select -assert-max 1 t:MISTRAL_ALUT4 # Clang returns 0, GCC returns 1
select -assert-max 2 t:MISTRAL_ALUT4 # Clang returns 0, GCC returns 1
select -assert-max 6 t:MISTRAL_ALUT5 # Clang returns 5, GCC returns 4
select -assert-max 2 t:MISTRAL_ALUT6 # Clang returns 1, GCC returns 2
select -assert-none t:MISTRAL_FF t:MISTRAL_ALUT2 t:MISTRAL_ALUT3 t:MISTRAL_ALUT4 t:MISTRAL_ALUT5 t:MISTRAL_ALUT6 %% t:* %D
select -assert-none t:MISTRAL_FF t:MISTRAL_NOT t:MISTRAL_ALUT2 t:MISTRAL_ALUT3 t:MISTRAL_ALUT4 t:MISTRAL_ALUT5 t:MISTRAL_ALUT6 %% t:* %D

6
tests/tools/autotest.sh
View File

@ -193,13 +193,13 @@ do
elif [ "$frontend" = "verific_gates" ]; then
test_passes -p "verific -vlog2k ${bn}_ref.${refext}; verific -import -gates -all; opt; memory;;"
else
test_passes -f "$frontend $include_opts" -p "hierarchy; proc; opt; memory; opt; fsm; opt -full -fine" ${bn}_ref.${refext}
test_passes -f "$frontend $include_opts" -p "hierarchy; proc; opt -nodffe -nosdff; fsm; opt; memory; opt -full -fine" ${bn}_ref.${refext}
test_passes -f "$frontend $include_opts" -p "hierarchy; synth -run coarse; techmap; opt; abc -dff" ${bn}_ref.${refext}
if [ -n "$firrtl2verilog" ]; then
if test -z "$xfirrtl" || ! grep "$fn" "$xfirrtl" ; then
"$toolsdir"/../../yosys -b "firrtl" -o ${bn}_ref.fir -f "$frontend $include_opts" -p "prep -nordff; proc; opt; memory; opt; fsm; opt -full -fine; pmuxtree" ${bn}_ref.${refext}
"$toolsdir"/../../yosys -b "firrtl" -o ${bn}_ref.fir -f "$frontend $include_opts" -p "prep -nordff; proc; opt -nodffe -nosdff; fsm; opt; memory; opt -full -fine; pmuxtree" ${bn}_ref.${refext}
$firrtl2verilog -i ${bn}_ref.fir -o ${bn}_ref.fir.v
test_passes -f "$frontend $include_opts" -p "hierarchy; proc; opt; memory; opt; fsm; opt -full -fine" ${bn}_ref.fir.v
test_passes -f "$frontend $include_opts" -p "hierarchy; proc; opt -nodffe -nosdff; fsm; opt; memory; opt -full -fine" ${bn}_ref.fir.v
fi
fi
fi