mirror of https://github.com/YosysHQ/yosys.git
ecp5: First BRAM type maps successfully
Signed-off-by: David Shah <dave@ds0.me>
This commit is contained in:
parent
2ef1af8b58
commit
983fb7ff88
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@ -6,3 +6,4 @@ bram_conn_2.vh
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bram_conn_4.vh
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bram_conn_4.vh
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bram_conn_9.vh
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bram_conn_9.vh
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bram_conn_18.vh
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bram_conn_18.vh
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brams_connect.mk
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@ -5,19 +5,38 @@ $(eval $(call add_share_file,share/ecp5,techlibs/ecp5/cells_map.v))
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$(eval $(call add_share_file,share/ecp5,techlibs/ecp5/cells_sim.v))
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$(eval $(call add_share_file,share/ecp5,techlibs/ecp5/cells_sim.v))
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$(eval $(call add_share_file,share/ecp5,techlibs/ecp5/drams_map.v))
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$(eval $(call add_share_file,share/ecp5,techlibs/ecp5/drams_map.v))
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$(eval $(call add_share_file,share/ecp5,techlibs/ecp5/dram.txt))
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$(eval $(call add_share_file,share/ecp5,techlibs/ecp5/dram.txt))
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$(eval $(call add_share_file,share/ecp5,techlibs/ecp5/brams_map.v))
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$(eval $(call add_share_file,share/ecp5,techlibs/ecp5/bram.txt))
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$(eval $(call add_share_file,share/ecp5,techlibs/ecp5/bram.txt))
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$(eval $(call add_share_file,share/ecp5,techlibs/ecp5/arith_map.v))
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$(eval $(call add_share_file,share/ecp5,techlibs/ecp5/arith_map.v))
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EXTRA_OBJS += techlibs/ecp5/brams_init.mk
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EXTRA_OBJS += techlibs/ecp5/brams_init.mk techlibs/ecp5/brams_connect.mk
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.SECONDARY: techlibs/ecp5/brams_init.mk
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.SECONDARY: techlibs/ecp5/brams_init.mk techlibs/ecp5/brams_connect.mk
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techlibs/ecp5/brams_init.mk: techlibs/ecp5/brams_init.py
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techlibs/ecp5/brams_init.mk: techlibs/ecp5/brams_init.py
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$(Q) mkdir -p techlibs/ecp5
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$(Q) mkdir -p techlibs/ecp5
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$(P) python3 $<
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$(P) python3 $<
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$(Q) touch $@
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$(Q) touch $@
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techlibs/ecp5/brams_connect.mk: techlibs/ecp5/brams_connect.py
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$(Q) mkdir -p techlibs/ecp5
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$(P) python3 $<
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$(Q) touch $@
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techlibs/ecp5/bram_init_1_2_4.vh: techlibs/ecp5/brams_init.mk
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techlibs/ecp5/bram_init_1_2_4.vh: techlibs/ecp5/brams_init.mk
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techlibs/ecp5/bram_init_9_18_36.vh: techlibs/ecp5/brams_init.mk
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techlibs/ecp5/bram_init_9_18_36.vh: techlibs/ecp5/brams_init.mk
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techlibs/ecp5/bram_conn_1.vh: techlibs/ecp5/brams_connect.mk
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techlibs/ecp5/bram_conn_2.vh: techlibs/ecp5/brams_connect.mk
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techlibs/ecp5/bram_conn_4.vh: techlibs/ecp5/brams_connect.mk
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techlibs/ecp5/bram_conn_9.vh: techlibs/ecp5/brams_connect.mk
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techlibs/ecp5/bram_conn_18.vh: techlibs/ecp5/brams_connect.mk
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$(eval $(call add_share_file,share/ecp5,techlibs/ecp5/bram_init_1_2_4.vh))
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$(eval $(call add_share_file,share/ecp5,techlibs/ecp5/bram_init_1_2_4.vh))
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$(eval $(call add_share_file,share/ecp5,techlibs/ecp5/bram_init_9_18_36.vh))
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$(eval $(call add_share_file,share/ecp5,techlibs/ecp5/bram_init_9_18_36.vh))
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$(eval $(call add_share_file,share/ecp5,techlibs/ecp5/bram_conn_1.vh))
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$(eval $(call add_share_file,share/ecp5,techlibs/ecp5/bram_conn_2.vh))
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$(eval $(call add_share_file,share/ecp5,techlibs/ecp5/bram_conn_4.vh))
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$(eval $(call add_share_file,share/ecp5,techlibs/ecp5/bram_conn_9.vh))
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$(eval $(call add_share_file,share/ecp5,techlibs/ecp5/bram_conn_18.vh))
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@ -18,8 +18,8 @@ bram $__ECP5_DP16KD
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enable 2 1 @a10d18
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enable 2 1 @a10d18
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enable 1 1 @a11d9 @a12d4 @a13d2 @a14d1
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enable 1 1 @a11d9 @a12d4 @a13d2 @a14d1
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transp 0 2
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transp 0 2
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clocks 1 2
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clocks 2 3
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clkpol 2 2
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clkpol 2 3
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endbram
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endbram
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match $__ECP5_DP16KD
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match $__ECP5_DP16KD
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@ -8,7 +8,7 @@ with open("techlibs/ecp5/bram_init_1_2_4.vh", "w") as f:
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init_snippets = list(reversed(init_snippets))
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init_snippets = list(reversed(init_snippets))
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for k in range(8, 64, 8):
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for k in range(8, 64, 8):
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init_snippets[k] = "\n " + init_snippets[k]
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init_snippets[k] = "\n " + init_snippets[k]
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print(".INIT_%02X({%s})," % (i, ", ".join(init_snippets)), file=f)
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print(".INITVAL_%02X({%s})," % (i, ", ".join(init_snippets)), file=f)
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with open("techlibs/ecp5/bram_init_9_18_36.vh", "w") as f:
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with open("techlibs/ecp5/bram_init_9_18_36.vh", "w") as f:
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for i in range(0, 0x40):
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for i in range(0, 0x40):
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@ -19,4 +19,4 @@ with open("techlibs/ecp5/bram_init_9_18_36.vh", "w") as f:
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init_snippets = list(reversed(init_snippets))
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init_snippets = list(reversed(init_snippets))
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for k in range(8, 32, 8):
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for k in range(8, 32, 8):
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init_snippets[k] = "\n " + init_snippets[k]
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init_snippets[k] = "\n " + init_snippets[k]
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print(".INIT_%02X({%s})," % (i, ", ".join(init_snippets)), file=f)
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print(".INITVAL_%02X({%s})," % (i, ", ".join(init_snippets)), file=f)
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@ -0,0 +1,47 @@
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module \$__ECP5_DP16KD (CLK2, CLK3, A1ADDR, A1DATA, A1EN, B1ADDR, B1DATA, B1EN);
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parameter CFG_ABITS = 10;
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parameter CFG_DBITS = 18;
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parameter CFG_ENABLE_A = 2;
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parameter CLKPOL2 = 1;
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parameter CLKPOL3 = 1;
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parameter [18431:0] INIT = 18432'bx;
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parameter TRANSP2 = 0;
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input CLK2;
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input CLK3;
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input [CFG_ABITS-1:0] A1ADDR;
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input [CFG_DBITS-1:0] A1DATA;
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input [CFG_ENABLE_A-1:0] A1EN;
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input [CFG_ABITS-1:0] B1ADDR;
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output [CFG_DBITS-1:0] B1DATA;
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input B1EN;
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localparam CLKAMUX = CLKPOL2 ? "CLKA" : "INV";
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localparam CLKBMUX = CLKPOL3 ? "CLKB" : "INV";
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localparam WRITEMODE_A = TRANSP2 ? "WRITETHROUGH" : "NORMAL";
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generate if (CFG_DBITS == 1) begin
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DP16KD #(
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`include "bram_init_1_2_4.vh"
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.DATA_WIDTH_A(1),
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.DATA_WIDTH_B(1),
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.CLKAMUX(CLKAMUX),
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.CLKBMUX(CLKBMUX),
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.WRITEMODE_A(WRITEMODE_A),
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.GSR("DISABLED")
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) _TECHMAP_REPLACE_ (
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`include "bram_conn_1.vh"
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.CLKA(CLK2), .CLKB(CLK3),
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.WEA(1'b1), .CEA(|A1EN), .OCEA(1'b1),
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.WEB(1'b0), .CEB(B1EN), .OCEB(1'b1),
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.RSTA(1'b0), .RSTB(1'b0)
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);
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end else begin
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wire TECHMAP_FAIL = 1'b1;
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end endgenerate
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endmodule
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@ -475,6 +475,8 @@ module DP16KD(
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parameter WRITEMODE_A = "NORMAL";
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parameter WRITEMODE_A = "NORMAL";
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parameter WRITEMODE_B = "NORMAL";
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parameter WRITEMODE_B = "NORMAL";
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parameter CLKAMUX = "CLKA";
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parameter CLKBMUX = "CLKB";
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parameter GSR = "ENABLED";
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parameter GSR = "ENABLED";
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@ -222,11 +222,8 @@ struct SynthEcp5Pass : public ScriptPass
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if (!nobram && check_label("bram", "(skip if -nobram)"))
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if (!nobram && check_label("bram", "(skip if -nobram)"))
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{
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{
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//TODO
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run("memory_bram -rules +/ecp5/bram.txt");
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#if 0
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run("memory_bram -rules +/ecp5/brams.txt");
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run("techmap -map +/ecp5/brams_map.v");
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run("techmap -map +/ecp5/brams_map.v");
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#endif
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}
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}
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if (!nodram && check_label("dram", "(skip if -nodram)"))
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if (!nodram && check_label("dram", "(skip if -nodram)"))
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