riscv
/
yosys
mirror of https://github.com/YosysHQ/yosys.git
1
0
Fork 0
Code Issues Projects Releases Wiki Activity

fsm_export: specify KISS filename on command line

This commit is contained in:
Johann Glaser 2013-04-05 11:17:49 +02:00
parent af4444e5b9
commit 9714072b28
1 changed files with 20 additions and 5 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

25
passes/fsm/fsm_export.cc
View File

@ -49,7 +49,7 @@ std::string kiss_convert_signal(const RTLIL::SigSpec &sig) {
* @param module pointer to module which contains the FSM cell. * @param module pointer to module which contains the FSM cell.
* @param cell pointer to the FSM cell which should be exported. * @param cell pointer to the FSM cell which should be exported.
*/ */
void write_kiss2(struct RTLIL::Module *module, struct RTLIL::Cell *cell) { void write_kiss2(struct RTLIL::Module *module, struct RTLIL::Cell *cell, std::string filename) {
std::map<RTLIL::IdString, RTLIL::Const>::iterator attr_it; std::map<RTLIL::IdString, RTLIL::Const>::iterator attr_it;
FsmData fsm_data; FsmData fsm_data;
FsmData::transition_t tr; FsmData::transition_t tr;
@ -58,7 +58,9 @@ void write_kiss2(struct RTLIL::Module *module, struct RTLIL::Cell *cell) {
size_t i; size_t i;
attr_it = cell->attributes.find("\\fsm_export"); attr_it = cell->attributes.find("\\fsm_export");
if (attr_it != cell->attributes.end() && attr_it->second.str != "") { if (!filename.empty()) {
kiss_name.assign(filename);
} else if (attr_it != cell->attributes.end() && attr_it->second.str != "") {
kiss_name.assign(attr_it->second.str); kiss_name.assign(attr_it->second.str);
} }
else { else {
@ -114,21 +116,28 @@ struct FsmExportPass : public Pass {
{ {
// |---v---|---v---|---v---|---v---|---v---|---v---|---v---|---v---|---v---|---v---| // |---v---|---v---|---v---|---v---|---v---|---v---|---v---|---v---|---v---|---v---|
log("\n"); log("\n");
log(" fsm_export [-noauto] [selection]\n"); log(" fsm_export [-noauto] [-o filename] [selection]\n");
log("\n"); log("\n");
log("This pass creates a KISS2 file for every selected FSM. For FSMs with the\n"); log("This pass creates a KISS2 file for every selected FSM. For FSMs with the\n");
log("'fsm_export' attribute set, the attribute value is used as filename, otherwise\n"); log("'fsm_export' attribute set, the attribute value is used as filename, otherwise\n");
log("the module and cell name is used as filename.\n"); log("the module and cell name is used as filename. If the parameter '-o' is given,\n");
log("the first exported FSM is written to the specified filename. This overwrites\n");
log("the setting as specified with the 'fsm_export' attribute. All other FSMs are\n");
log("exported to the default name as mentioned above.\n");
log("\n"); log("\n");
log(" -noauto\n"); log(" -noauto\n");
log(" only export FSMs that have the 'fsm_export' attribute set\n"); log(" only export FSMs that have the 'fsm_export' attribute set\n");
log("\n"); log("\n");
log(" -o filename\n");
log(" filename of the first exported FSM\n");
log("\n");
} }
virtual void execute(std::vector<std::string> args, RTLIL::Design *design) virtual void execute(std::vector<std::string> args, RTLIL::Design *design)
{ {
std::map<RTLIL::IdString, RTLIL::Const>::iterator attr_it; std::map<RTLIL::IdString, RTLIL::Const>::iterator attr_it;
std::string arg; std::string arg;
bool flag_noauto = false; bool flag_noauto = false;
std::string filename;
size_t argidx; size_t argidx;
log_header("Executing FSM_EXPORT pass (exporting FSMs in KISS2 file format).\n"); log_header("Executing FSM_EXPORT pass (exporting FSMs in KISS2 file format).\n");
@ -139,6 +148,11 @@ struct FsmExportPass : public Pass {
flag_noauto = true; flag_noauto = true;
continue; continue;
} }
if (arg == "-o") {
argidx++;
filename = args[argidx];
continue;
}
break; break;
} }
extra_args(args, argidx, design); extra_args(args, argidx, design);
@ -149,7 +163,8 @@ struct FsmExportPass : public Pass {
if (cell_it.second->type == "$fsm" && design->selected(mod_it.second, cell_it.second)) { if (cell_it.second->type == "$fsm" && design->selected(mod_it.second, cell_it.second)) {
attr_it = cell_it.second->attributes.find("\\fsm_export"); attr_it = cell_it.second->attributes.find("\\fsm_export");
if (!flag_noauto || (attr_it != cell_it.second->attributes.end())) { if (!flag_noauto || (attr_it != cell_it.second->attributes.end())) {
write_kiss2(mod_it.second, cell_it.second); write_kiss2(mod_it.second, cell_it.second, filename);
filename.clear();
} }
} }
} }