mirror of https://github.com/YosysHQ/yosys.git
Fixed async proc detection in mem2reg
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parent
09471846c5
commit
95c94a02fc
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@ -77,9 +77,13 @@ bool AstNode::simplify(bool const_fold, bool at_zero, bool in_lvalue, int stage,
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if (memflags & AstNode::MEM2REG_FL_EQ2)
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goto verbose_activate;
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if (memflags & AstNode::MEM2REG_FL_SET_ASYNC)
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goto verbose_activate;
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if ((memflags & AstNode::MEM2REG_FL_SET_INIT) && (memflags & AstNode::MEM2REG_FL_SET_ELSE))
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goto verbose_activate;
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// log("Note: Not replacing memory %s with list of registers (flags=0x%08lx).\n", mem->str.c_str(), long(memflags));
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continue;
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verbose_activate:
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@ -94,6 +98,7 @@ bool AstNode::simplify(bool const_fold, bool at_zero, bool in_lvalue, int stage,
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}
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silent_activate:
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// log("Note: Replacing memory %s with list of registers (flags=0x%08lx).\n", mem->str.c_str(), long(memflags));
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mem2reg_set.insert(mem);
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}
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@ -1349,12 +1354,11 @@ void AstNode::mem2reg_as_needed_pass1(std::map<AstNode*, std::set<std::string>>
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std::map<AstNode*, uint32_t> *proc_flags_p = NULL;
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if (type == AST_ALWAYS) {
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bool sync_proc = false;
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for (auto child : children) {
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int count_edge_events = 0;
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for (auto child : children)
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if (child->type == AST_POSEDGE || child->type == AST_NEGEDGE)
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sync_proc = true;
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}
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if (!sync_proc)
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count_edge_events++;
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if (count_edge_events != 1)
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children_flags |= AstNode::MEM2REG_FL_ASYNC;
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proc_flags_p = new std::map<AstNode*, uint32_t>;
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}
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