mirror of https://github.com/YosysHQ/yosys.git
Drop keep=0 attributes on SB_CARRY
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@ -51,6 +51,9 @@ void create_ice40_wrapcarry(ice40_wrapcarry_pm &pm)
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cell->setParam("\\LUT", st.lut->getParam("\\LUT_INIT"));
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cell->attributes = std::move(st.carry->attributes);
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auto it = cell->attributes.find(ID::keep);
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if (it != cell->attributes.end() && !it->second.as_bool())
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cell->attributes.erase(it);
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cell->attributes.insert(st.lut->attributes.begin(), st.lut->attributes.end());
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pm.autoremove(st.carry);
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@ -69,6 +72,11 @@ struct Ice40WrapCarryPass : public Pass {
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log("into an internal $__ICE40_CARRY_WRAPPER cell for preservation across technology\n");
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log("mapping.");
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log("\n");
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log("Attributes on both cells will be merged, with SB_CARRY attributes having priority\n");
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log("over SB_LUT4 attributes, except when (* keep *) attributes present on the SB_CARRY4\n");
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log("that logically evaluate to false will be dropped (thus allowing the keep attribute,\n");
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log("if any, on the SB_LUT4 to be adopted).\n");
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log("\n");
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}
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void execute(std::vector<std::string> args, RTLIL::Design *design) YS_OVERRIDE
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{
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@ -24,7 +24,7 @@ select -assert-count 1 t:$__ICE40_CARRY_WRAPPER
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design -reset
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read_verilog <<EOT
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module top(input A, B, CI, output O, CO);
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(* foo = "bar", answer = 42 *)
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(* foo = "bar", answer = 42, keep=0 *)
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SB_CARRY carry (
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.I0(A),
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.I1(B),
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@ -47,6 +47,6 @@ EOT
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ice40_wrapcarry
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select -assert-count 1 t:$__ICE40_CARRY_WRAPPER
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select -assert-count 0 t:* t:$__ICE40_CARRY_WRAPPER %d
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select -assert-count 1 a:foo=bar a:answer=42 %i a:keep %i a:blah=blah %i
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select -assert-count 1 a:foo=bar a:answer=42 %i a:keep=1 %i a:blah=blah %i
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techmap -map +/ice40/cells_map.v
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#TODO: Check unwrapped attributes
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