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Merge pull request #664 from tklam/ignore-verilog-protect 

Ignore protect endprotect
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Clifford Wolf 2018-10-18 10:52:07 +02:00 committed by GitHub
parent 22d9535a24 097da32e1a
commit 93d99559ef
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frontends/verilog/verilog_lexer.l
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@ -135,6 +135,9 @@ YOSYS_NAMESPACE_END
frontend_verilog_yyerror("Unsupported default nettype: %s", p);
}
"`protect"[^\n]* /* ignore `protect*/
"`endprotect"[^\n]* /* ignore `endprotect*/
"`"[a-zA-Z_$][a-zA-Z0-9_$]* {
frontend_verilog_yyerror("Unimplemented compiler directive or undefined macro %s.", yytext);
}