diff --git a/frontends/verilog/const2ast.cc b/frontends/verilog/const2ast.cc
index 49281f7e7..25d257867 100644
--- a/frontends/verilog/const2ast.cc
+++ b/frontends/verilog/const2ast.cc
@@ -139,6 +139,10 @@ static void my_strtobin(std::vector<RTLIL::State> &data, const char *str, int le
 		data.resize(len_in_bits, msb);
 	}
 
+	if (len_in_bits == 0)
+		log_error("Illegal integer constant size of zero in %s:%d (IEEE 1800-2012, 5.7).\n",
+				current_filename.c_str(), get_line_num());
+
 	if (len > len_in_bits)
 		log_warning("Literal has a width of %d bit, but value requires %d bit. (%s:%d)\n",
 			len_in_bits, len, current_filename.c_str(), get_line_num());