mirror of https://github.com/YosysHQ/yosys.git
Fix performance bug in RTLIL::SigSpec::operator==(), fixes #970
Signed-off-by: Clifford Wolf <clifford@clifford.at>
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@ -3456,7 +3456,7 @@ bool RTLIL::SigSpec::operator ==(const RTLIL::SigSpec &other) const
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pack();
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pack();
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other.pack();
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other.pack();
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if (chunks_.size() != chunks_.size())
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if (chunks_.size() != other.chunks_.size())
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return false;
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return false;
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updhash();
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updhash();
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