mirror of https://github.com/YosysHQ/yosys.git
read_aiger to ignore line after ands for ascii, not binary
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@ -235,6 +235,7 @@ void AigerReader::parse_aiger_ascii()
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RTLIL::Wire *i2_wire = createWireIfNotExists(module, l3);
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module->addAndGate(NEW_ID, i1_wire, i2_wire, o_wire);
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}
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std::getline(f, line); // Ignore up to start of next line
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}
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static unsigned parse_next_delta_literal(std::istream &f, unsigned ref)
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@ -342,8 +343,6 @@ void AigerReader::parse_aiger_binary()
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and_cell->setPort("\\B", i2_wire);
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and_cell->setPort("\\Y", o_wire);
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}
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std::getline(f, line); // Ignore up to start of next line
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}
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struct AigerFrontend : public Frontend {
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