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Fix spacing

This commit is contained in:
Eddie Hung 2019-03-19 16:12:32 -07:00
parent 4cd8f02973
commit 9156e18f92
1 changed files with 1 additions and 1 deletions
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2
techlibs/xilinx/cells_map.v
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@ -76,7 +76,7 @@ module \$__SHREG_ (input C, input D, input [31:0] L, input E, output Q);
if (&_TECHMAP_CONSTMSK_L_) if (&_TECHMAP_CONSTMSK_L_)
assign Q = T4; assign Q = T4;
else begin else begin
MUXF7 fpga_mux_0 (.O(T5), .I0(T0), .I1(T2), .S(L[5])); MUXF7 fpga_mux_0 (.O(T5), .I0(T0), .I1(T2), .S(L[5]));
MUXF7 fpga_mux_1 (.O(T6), .I0(T4), .I1(1'b0 /* unused */), .S(L[5])); MUXF7 fpga_mux_1 (.O(T6), .I0(T4), .I1(1'b0 /* unused */), .S(L[5]));
MUXF8 fpga_mux_2 (.O(Q), .I0(T5), .I1(T6), .S(L[6])); MUXF8 fpga_mux_2 (.O(Q), .I0(T5), .I1(T6), .S(L[6]));
end end