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Update from master

This commit is contained in:
Eddie Hung 2019-05-28 09:35:45 -07:00
parent 6931a3a47d
commit 914074a07c
5 changed files with 59 additions and 64 deletions
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9
backends/json/json.cc
View File

@ -130,10 +130,9 @@ struct JsonWriter
f << stringf(" }");
first = false;
}
f << stringf("\n }");
f << stringf("\n },\n");
if (!module->get_blackbox_attribute()) {
f << stringf(",\n \"cells\": {");
f << stringf(" \"cells\": {");
first = true;
for (auto c : module->cells()) {
if (use_selection && !module->selected(c))
@ -196,9 +195,7 @@ struct JsonWriter
f << stringf(" }");
first = false;
}
f << stringf("\n }");
}
f << stringf("\n");
f << stringf("\n }\n");
f << stringf(" }");
}

2
kernel/cellaigs.cc
View File

@ -453,7 +453,7 @@ Aig::Aig(Cell *cell)
int B = mk.inport("\\B");
int C = mk.inport("\\C");
int D = mk.inport("\\D");
int Y = mk.nand_gate(mk.nor_gate(A, B), mk.nor_gate(C, D));
int Y = mk.nand_gate(mk.or_gate(A, B), mk.or_gate(C, D));
mk.outport(Y, "\\Y");
goto optimize;
}

2
kernel/celltypes.h
View File

@ -469,7 +469,7 @@ struct CellTypes
if (cell->type == "$_AOI4_")
return eval_not(const_or(const_and(arg1, arg2, false, false, 1), const_and(arg3, arg4, false, false, 1), false, false, 1));
if (cell->type == "$_OAI4_")
return eval_not(const_and(const_or(arg1, arg2, false, false, 1), const_and(arg3, arg4, false, false, 1), false, false, 1));
return eval_not(const_and(const_or(arg1, arg2, false, false, 1), const_or(arg3, arg4, false, false, 1), false, false, 1));
log_assert(arg4.bits.size() == 0);
return eval(cell, arg1, arg2, arg3, errp);

2
passes/opt/wreduce.cc
View File

@ -465,12 +465,10 @@ struct WreduceWorker
SigSpec initsig = init_attr_sigmap(w);
int width = std::min(GetSize(initval), GetSize(initsig));
for (int i = 0; i < width; i++) {
log_dump(initsig[i], remove_init_bits.count(initsig[i]));
if (!remove_init_bits.count(initsig[i]))
new_initval[i] = initval[i];
}
w->attributes.at("\\init") = new_initval;
log_dump(w->name, initval, new_initval);
}
}
}

2
passes/sat/expose.cc
View File

@ -42,7 +42,7 @@ struct dff_map_bit_info_t {
bool consider_wire(RTLIL::Wire *wire, std::map<RTLIL::IdString, dff_map_info_t> &dff_dq_map)
{
if (/*wire->name[0] == '$' ||*/ dff_dq_map.count(wire->name))
if (wire->name[0] == '$' || dff_dq_map.count(wire->name))
return false;
if (wire->port_input)
return false;