From 90c78f1f85f7e519b3d99a71722bbb40e7ee2960 Mon Sep 17 00:00:00 2001
From: Stefan Biereigel <stefan@biereigel.de>
Date: Mon, 3 Feb 2020 21:29:54 +0100
Subject: [PATCH] add testcase for #1614

---
 tests/various/bug1614.ys | 5 +++++
 1 file changed, 5 insertions(+)
 create mode 100644 tests/various/bug1614.ys

diff --git a/tests/various/bug1614.ys b/tests/various/bug1614.ys
new file mode 100644
index 000000000..6fbe84a4c
--- /dev/null
+++ b/tests/various/bug1614.ys
@@ -0,0 +1,5 @@
+read_verilog <<EOT
+module testcase;
+    wire [3:0] #1 a = 4'b0000;
+endmodule
+EOT