riscv
/
yosys
mirror of https://github.com/YosysHQ/yosys.git
1
0
Fork 0
Code Issues Projects Releases Wiki Activity

OSX compatible creation of stdcells.inc, using code from github.com/Siesh1oo/yosys 

(see https://github.com/cliffordwolf/yosys/pull/28)
This commit is contained in:
Clifford Wolf 2014-03-11 14:52:37 +01:00
parent 7aa2d746b7
commit 9087ece97c
1 changed files with 3 additions and 2 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

5
passes/techmap/Makefile.inc
View File

@ -11,8 +11,9 @@ GENFILES += passes/techmap/stdcells.inc
passes/techmap/stdcells.inc: techlibs/common/stdcells.v passes/techmap/stdcells.inc: techlibs/common/stdcells.v
echo "// autogenerated from $<" > $@.new echo "// autogenerated from $<" > $@.new
od -v -td1 -w1 $< | awk 'BEGIN { print "static char stdcells_code[] = {"; } $$2 != "" { print $$2 ","; } \ echo "static char stdcells_code[] = {" >> $@.new
END { print 0 "};"; }' | fmt >> $@.new od -v -td1 -An $< | $(SED) -e 's/[0-9][0-9]*/&,/g' >> $@.new
echo "0};" >> $@.new
mv $@.new $@ mv $@.new $@
passes/techmap/techmap.o: passes/techmap/stdcells.inc passes/techmap/techmap.o: passes/techmap/stdcells.inc