mirror of https://github.com/YosysHQ/yosys.git
read_aiger fixes
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9c5ceb5b4f
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@ -490,9 +490,9 @@ void AigerReader::parse_aiger_ascii()
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log_error("Line %u cannot be interpreted as an input!\n", line_count);
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log_debug2("%d is an input\n", l1);
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log_assert(!(l1 & 1)); // Inputs can't be inverted
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RTLIL::Wire *wire = module->addWire(stringf("$i%0*d", digits, i));
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RTLIL::Wire *wire = module->addWire(stringf("$i%0*d", digits, l1 >> 1));
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wire->port_input = true;
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module->connect(createWireIfNotExists(module, l1 << 1), wire);
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module->connect(createWireIfNotExists(module, l1), wire);
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inputs.push_back(wire);
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}
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@ -553,7 +553,7 @@ void AigerReader::parse_aiger_ascii()
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module->connect(wire, createWireIfNotExists(module, l1));
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outputs.push_back(wire);
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}
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std::getline(f, line); // Ignore up to start of next line
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//std::getline(f, line); // Ignore up to start of next line
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// Parse bad properties
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for (unsigned i = 0; i < B; ++i, ++line_count) {
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@ -565,8 +565,8 @@ void AigerReader::parse_aiger_ascii()
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wire->port_output = true;
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bad_properties.push_back(wire);
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}
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if (B > 0)
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std::getline(f, line); // Ignore up to start of next line
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//if (B > 0)
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// std::getline(f, line); // Ignore up to start of next line
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// TODO: Parse invariant constraints
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for (unsigned i = 0; i < C; ++i, ++line_count)
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