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Improved undef handling in == and != for ConstEval

This commit is contained in:
Clifford Wolf 2013-11-06 22:21:58 +01:00
parent baeca48a24
commit 8c523ef81d
1 changed files with 25 additions and 11 deletions
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36
kernel/calc.cc
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@ -334,23 +334,37 @@ RTLIL::Const RTLIL::const_le(const RTLIL::Const &arg1, const RTLIL::Const &arg2,
RTLIL::Const RTLIL::const_eq(const RTLIL::Const &arg1, const RTLIL::Const &arg2, bool signed1, bool signed2, int result_len) RTLIL::Const RTLIL::const_eq(const RTLIL::Const &arg1, const RTLIL::Const &arg2, bool signed1, bool signed2, int result_len)
{ {
int undef_bit_pos = -1; RTLIL::Const arg1_ext = arg1;
bool y = const2big(arg1, signed1, undef_bit_pos) == const2big(arg2, signed2, undef_bit_pos); RTLIL::Const arg2_ext = arg2;
RTLIL::Const result(undef_bit_pos >= 0 ? RTLIL::State::Sx : y ? RTLIL::State::S1 : RTLIL::State::S0); RTLIL::Const result(RTLIL::State::S0, result_len);
while (int(result.bits.size()) < result_len) while (arg1_ext.bits.size() < arg2_ext.bits.size())
result.bits.push_back(RTLIL::State::S0); arg1_ext.bits.push_back(signed1 && signed2 && arg1_ext.bits.size() > 0 ? arg1_ext.bits.back() : RTLIL::State::S0);
while (arg2_ext.bits.size() < arg1_ext.bits.size())
arg2_ext.bits.push_back(signed1 && signed2 && arg2_ext.bits.size() > 0 ? arg2_ext.bits.back() : RTLIL::State::S0);
RTLIL::State matched_status = RTLIL::State::S1;
for (size_t i = 0; i < arg1_ext.bits.size(); i++) {
if (arg1_ext.bits.at(i) == RTLIL::State::S0 && arg2_ext.bits.at(i) == RTLIL::State::S1)
return result;
if (arg1_ext.bits.at(i) == RTLIL::State::S1 && arg2_ext.bits.at(i) == RTLIL::State::S0)
return result;
if (arg1_ext.bits.at(i) > RTLIL::State::S1 || arg2_ext.bits.at(i) > RTLIL::State::S1)
matched_status = RTLIL::State::Sx;
}
result.bits.front() = matched_status;
return result; return result;
} }
RTLIL::Const RTLIL::const_ne(const RTLIL::Const &arg1, const RTLIL::Const &arg2, bool signed1, bool signed2, int result_len) RTLIL::Const RTLIL::const_ne(const RTLIL::Const &arg1, const RTLIL::Const &arg2, bool signed1, bool signed2, int result_len)
{ {
int undef_bit_pos = -1; RTLIL::Const result = RTLIL::const_eq(arg1, arg2, signed1, signed2, result_len);
bool y = const2big(arg1, signed1, undef_bit_pos) != const2big(arg2, signed2, undef_bit_pos); if (result.bits.front() == RTLIL::State::S0)
RTLIL::Const result(undef_bit_pos >= 0 ? RTLIL::State::Sx : y ? RTLIL::State::S1 : RTLIL::State::S0); result.bits.front() = RTLIL::State::S1;
else if (result.bits.front() == RTLIL::State::S1)
while (int(result.bits.size()) < result_len) result.bits.front() = RTLIL::State::S0;
result.bits.push_back(RTLIL::State::S0);
return result; return result;
} }