mirror of https://github.com/YosysHQ/yosys.git
parent
e9effd58d2
commit
8bdc019730
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@ -199,7 +199,7 @@ bool AstNode::get_bool_attribute(RTLIL::IdString id)
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// create new node (AstNode constructor)
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// (the optional child arguments make it easier to create AST trees)
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AstNode::AstNode(AstNodeType type, AstNode *child1, AstNode *child2, AstNode *child3)
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AstNode::AstNode(AstNodeType type, AstNode *child1, AstNode *child2, AstNode *child3, AstNode *child4)
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{
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static unsigned int hashidx_count = 123456789;
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hashidx_count = mkhash_xorshift(hashidx_count);
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@ -236,6 +236,8 @@ AstNode::AstNode(AstNodeType type, AstNode *child1, AstNode *child2, AstNode *ch
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children.push_back(child2);
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if (child3)
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children.push_back(child3);
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if (child4)
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children.push_back(child4);
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}
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// create a (deep recursive) copy of a node
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@ -221,7 +221,7 @@ namespace AST
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AstSrcLocType location;
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// creating and deleting nodes
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AstNode(AstNodeType type = AST_NONE, AstNode *child1 = NULL, AstNode *child2 = NULL, AstNode *child3 = NULL);
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AstNode(AstNodeType type = AST_NONE, AstNode *child1 = nullptr, AstNode *child2 = nullptr, AstNode *child3 = nullptr, AstNode *child4 = nullptr);
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AstNode *clone() const;
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void cloneInto(AstNode *other) const;
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void delete_children();
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@ -1720,21 +1720,24 @@ RTLIL::SigSpec AstNode::genRTLIL(int width_hint, bool sign_hint)
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std::stringstream sstr;
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sstr << "$meminit$" << str << "$" << filename << ":" << location.first_line << "$" << (autoidx++);
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RTLIL::Cell *cell = current_module->addCell(sstr.str(), ID($meminit));
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SigSpec en_sig = children[2]->genRTLIL();
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RTLIL::Cell *cell = current_module->addCell(sstr.str(), ID($meminit_v2));
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set_src_attr(cell, this);
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int mem_width, mem_size, addr_bits;
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id2ast->meminfo(mem_width, mem_size, addr_bits);
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if (children[2]->type != AST_CONSTANT)
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if (children[3]->type != AST_CONSTANT)
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log_file_error(filename, location.first_line, "Memory init with non-constant word count!\n");
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int num_words = int(children[2]->asInt(false));
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int num_words = int(children[3]->asInt(false));
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cell->parameters[ID::WORDS] = RTLIL::Const(num_words);
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SigSpec addr_sig = children[0]->genRTLIL();
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cell->setPort(ID::ADDR, addr_sig);
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cell->setPort(ID::DATA, children[1]->genWidthRTLIL(current_module->memories[str]->width * num_words, true));
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cell->setPort(ID::EN, en_sig);
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cell->parameters[ID::MEMID] = RTLIL::Const(str);
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cell->parameters[ID::ABITS] = RTLIL::Const(GetSize(addr_sig));
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@ -2648,10 +2648,6 @@ skip_dynamic_range_lvalue_expansion:;
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node_data->str = id_data;
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}
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AstNode *node_en = nullptr;
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if (current_always->type == AST_INITIAL) {
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node_en = AstNode::mkconst_int(1, false);
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} else {
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AstNode *wire_en = new AstNode(AST_WIRE, new AstNode(AST_RANGE, mkconst_int(mem_width-1, true), mkconst_int(0, true)));
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wire_en->str = id_en;
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wire_en->was_checked = true;
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@ -2659,14 +2655,13 @@ skip_dynamic_range_lvalue_expansion:;
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current_scope[wire_en->str] = wire_en;
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while (wire_en->simplify(true, false, false, 1, -1, false, false)) { }
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AstNode *assign_en = new AstNode(AST_ASSIGN_EQ, new AstNode(AST_IDENTIFIER), mkconst_int(0, false, mem_width));
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assign_en->children[0]->str = id_en;
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assign_en->children[0]->was_checked = true;
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defNode->children.push_back(assign_en);
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AstNode *assign_en_first = new AstNode(AST_ASSIGN_EQ, new AstNode(AST_IDENTIFIER), mkconst_int(0, false, mem_width));
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assign_en_first->children[0]->str = id_en;
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assign_en_first->children[0]->was_checked = true;
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defNode->children.push_back(assign_en_first);
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node_en = new AstNode(AST_IDENTIFIER);
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AstNode *node_en = new AstNode(AST_IDENTIFIER);
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node_en->str = id_en;
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}
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if (!defNode->children.empty())
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current_top_block->children.insert(current_top_block->children.begin(), defNode);
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@ -2690,14 +2685,12 @@ skip_dynamic_range_lvalue_expansion:;
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assign_data->children[0]->str = id_data;
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assign_data->children[0]->was_checked = true;
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if (current_always->type != AST_INITIAL) {
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for (int i = 0; i < mem_width; i++)
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set_bits_en[i] = offset <= i && i < offset+width ? RTLIL::State::S1 : RTLIL::State::S0;
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assign_en = new AstNode(AST_ASSIGN_EQ, new AstNode(AST_IDENTIFIER), mkconst_bits(set_bits_en, false));
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assign_en->children[0]->str = id_en;
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assign_en->children[0]->was_checked = true;
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}
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}
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else
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{
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AstNode *the_range = children[0]->children[1];
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@ -2719,14 +2712,12 @@ skip_dynamic_range_lvalue_expansion:;
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assign_data->children[0]->str = id_data;
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assign_data->children[0]->was_checked = true;
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if (current_always->type != AST_INITIAL) {
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for (int i = 0; i < mem_width; i++)
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set_bits_en[i] = i < width ? RTLIL::State::S1 : RTLIL::State::S0;
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assign_en = new AstNode(AST_ASSIGN_EQ, new AstNode(AST_IDENTIFIER),
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new AstNode(AST_SHIFT_LEFT, mkconst_bits(set_bits_en, false), offset_ast->clone()));
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assign_en->children[0]->str = id_en;
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assign_en->children[0]->was_checked = true;
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}
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delete left_at_zero_ast;
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delete right_at_zero_ast;
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@ -2741,18 +2732,20 @@ skip_dynamic_range_lvalue_expansion:;
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assign_data->children[0]->was_checked = true;
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}
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if (current_always->type != AST_INITIAL) {
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assign_en = new AstNode(AST_ASSIGN_EQ, new AstNode(AST_IDENTIFIER), mkconst_bits(set_bits_en, false));
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assign_en->children[0]->str = id_en;
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assign_en->children[0]->was_checked = true;
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}
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}
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if (assign_data)
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newNode->children.push_back(assign_data);
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if (assign_en)
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newNode->children.push_back(assign_en);
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AstNode *wrnode = new AstNode(current_always->type == AST_INITIAL ? AST_MEMINIT : AST_MEMWR, node_addr, node_data, node_en);
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AstNode *wrnode;
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if (current_always->type == AST_INITIAL)
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wrnode = new AstNode(AST_MEMINIT, node_addr, node_data, node_en, mkconst_int(1, false));
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else
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wrnode = new AstNode(AST_MEMWR, node_addr, node_data, node_en);
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wrnode->str = children[0]->str;
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wrnode->id2ast = children[0]->id2ast;
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wrnode->location = location;
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@ -3921,8 +3914,12 @@ AstNode *AstNode::readmem(bool is_readmemh, std::string mem_filename, AstNode *m
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AstNode *meminit = nullptr;
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int next_meminit_cursor=0;
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vector<State> meminit_bits;
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vector<State> en_bits;
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int meminit_size=0;
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for (int i = 0; i < mem_width; i++)
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en_bits.push_back(State::S1);
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std::ifstream f;
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f.open(mem_filename.c_str());
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if (f.fail()) {
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@ -3996,12 +3993,13 @@ AstNode *AstNode::readmem(bool is_readmemh, std::string mem_filename, AstNode *m
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{
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if (meminit != nullptr) {
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meminit->children[1] = AstNode::mkconst_bits(meminit_bits, false);
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meminit->children[2] = AstNode::mkconst_int(meminit_size, false);
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meminit->children[3] = AstNode::mkconst_int(meminit_size, false);
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}
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meminit = new AstNode(AST_MEMINIT);
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meminit->children.push_back(AstNode::mkconst_int(cursor, false));
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meminit->children.push_back(nullptr);
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meminit->children.push_back(AstNode::mkconst_bits(en_bits, false));
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meminit->children.push_back(nullptr);
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meminit->str = memory->str;
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meminit->id2ast = memory;
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@ -4036,7 +4034,7 @@ AstNode *AstNode::readmem(bool is_readmemh, std::string mem_filename, AstNode *m
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if (meminit != nullptr) {
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meminit->children[1] = AstNode::mkconst_bits(meminit_bits, false);
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meminit->children[2] = AstNode::mkconst_int(meminit_size, false);
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meminit->children[3] = AstNode::mkconst_int(meminit_size, false);
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}
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return block;
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@ -4381,10 +4379,12 @@ bool AstNode::mem2reg_as_needed_pass2(pool<AstNode*> &mem2reg_set, AstNode *mod,
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log_assert(children[0]->type == AST_CONSTANT);
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log_assert(children[1]->type == AST_CONSTANT);
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log_assert(children[2]->type == AST_CONSTANT);
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log_assert(children[3]->type == AST_CONSTANT);
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int cursor = children[0]->asInt(false);
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Const data = children[1]->bitsAsConst();
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int length = children[2]->asInt(false);
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Const en = children[2]->bitsAsConst();
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int length = children[3]->asInt(false);
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if (length != 0)
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{
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@ -4395,10 +4395,37 @@ bool AstNode::mem2reg_as_needed_pass2(pool<AstNode*> &mem2reg_set, AstNode *mod,
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int wordsz = GetSize(data) / length;
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for (int i = 0; i < length; i++) {
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block->children.push_back(new AstNode(AST_ASSIGN_EQ, new AstNode(AST_IDENTIFIER, new AstNode(AST_RANGE, AstNode::mkconst_int(cursor+i, false))), mkconst_bits(data.extract(i*wordsz, wordsz).bits, false)));
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block->children.back()->children[0]->str = str;
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block->children.back()->children[0]->id2ast = id2ast;
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block->children.back()->children[0]->was_checked = true;
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int pos = 0;
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while (pos < wordsz) {
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if (en[pos] != State::S1) {
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pos++;
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} else {
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int epos = pos + 1;
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while (epos < wordsz && en[epos] == State::S1)
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epos++;
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int clen = epos - pos;
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AstNode *range = new AstNode(AST_RANGE, AstNode::mkconst_int(cursor+i, false));
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if (pos != 0 || epos != wordsz) {
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int left;
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int right;
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AstNode *mrange = id2ast->children[0];
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if (mrange->range_left < mrange->range_right) {
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right = mrange->range_right - pos;
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left = mrange->range_right - epos + 1;
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} else {
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right = mrange->range_right + pos;
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left = mrange->range_right + epos - 1;
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}
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range = new AstNode(AST_MULTIRANGE, range, new AstNode(AST_RANGE, AstNode::mkconst_int(left, true), AstNode::mkconst_int(right, true)));
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}
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AstNode *target = new AstNode(AST_IDENTIFIER, range);
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target->str = str;
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target->id2ast = id2ast;
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target->was_checked = true;
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block->children.push_back(new AstNode(AST_ASSIGN_EQ, target, mkconst_bits(data.extract(i*wordsz + pos, clen).bits, false)));
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pos = epos;
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}
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}
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}
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}
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@ -25,24 +25,24 @@ proc
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select -assert-count 2 t:$memrd
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select -assert-count 1 t:$memwr
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select -assert-count 1 t:$meminit
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select -assert-count 1 t:$meminit_v2
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design -save orig
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opt_clean
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select -assert-none t:$memrd
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select -assert-none t:$memwr
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select -assert-none t:$meminit
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select -assert-none t:$meminit_v2
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design -load orig
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expose top/rd1
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opt_clean
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select -assert-count 1 t:$memrd
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select -assert-count 1 t:$memwr
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select -assert-count 1 t:$meminit
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select -assert-count 1 t:$meminit_v2
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design -load orig
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expose top/rd1 top/rd2
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opt_clean
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select -assert-count 2 t:$memrd
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select -assert-count 1 t:$memwr
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select -assert-count 1 t:$meminit
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select -assert-count 1 t:$meminit_v2
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