diff --git a/tests/arch/quicklogic/dspv2/complex_mult.ys b/tests/arch/quicklogic/dspv2/complex_mult.ys
index b182f4067..350ee8d6b 100644
--- a/tests/arch/quicklogic/dspv2/complex_mult.ys
+++ b/tests/arch/quicklogic/dspv2/complex_mult.ys
@@ -14,7 +14,7 @@ EOF
 
 synth_quicklogic -family qlf_k6n10f -dspv2 -run :coarse
 check -assert
-read_verilog +/quicklogic/qlf_k6n10f/dsp_sim.v
+read_verilog +/quicklogic/qlf_k6n10f/dspv2_sim.v
 prep -top top -flatten
 opt_clean -purge
 opt -full
diff --git a/tests/arch/quicklogic/dspv2/simple2.ys b/tests/arch/quicklogic/dspv2/simple2.ys
index d03a412a8..a9a1794b8 100644
--- a/tests/arch/quicklogic/dspv2/simple2.ys
+++ b/tests/arch/quicklogic/dspv2/simple2.ys
@@ -6,7 +6,7 @@ endmodule
 EOF
 
 synth_quicklogic -family qlf_k6n10f -dspv2 -run :coarse
-read_verilog +/quicklogic/qlf_k6n10f/dsp_sim.v
+read_verilog +/quicklogic/qlf_k6n10f/dspv2_sim.v
 prep -top top -flatten
 opt_clean -purge
 dump