mirror of https://github.com/YosysHQ/yosys.git
Added "equiv_struct -fwonly"
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@ -32,6 +32,8 @@ struct EquivStructWorker
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bool mode_icells;
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bool mode_icells;
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int merge_count;
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int merge_count;
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const pool<IdString> &fwonly_cells;
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struct merge_key_t
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struct merge_key_t
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{
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{
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IdString type;
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IdString type;
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@ -114,9 +116,9 @@ struct EquivStructWorker
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module->remove(cell_b);
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module->remove(cell_b);
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}
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}
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EquivStructWorker(Module *module, bool mode_fwd, bool mode_icells, int iter_num) :
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EquivStructWorker(Module *module, bool mode_fwd, bool mode_icells, const pool<IdString> &fwonly_cells, int iter_num) :
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module(module), sigmap(module), equiv_bits(module),
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module(module), sigmap(module), equiv_bits(module),
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mode_fwd(mode_fwd), mode_icells(mode_icells), merge_count(0)
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mode_fwd(mode_fwd), mode_icells(mode_icells), merge_count(0), fwonly_cells(fwonly_cells)
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{
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{
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log(" Starting iteration %d.\n", iter_num);
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log(" Starting iteration %d.\n", iter_num);
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@ -222,7 +224,7 @@ struct EquivStructWorker
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}
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}
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}
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}
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if (phase && cells_type == "$equiv")
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if (phase && fwonly_cells.count(cells_type))
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continue;
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continue;
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if (GetSize(gold_cells) > 1 || GetSize(gate_cells) > 1 || GetSize(other_cells) > 1)
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if (GetSize(gold_cells) > 1 || GetSize(gate_cells) > 1 || GetSize(other_cells) > 1)
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@ -295,10 +297,15 @@ struct EquivStructPass : public Pass {
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log("\n");
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log("\n");
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log(" -fwd\n");
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log(" -fwd\n");
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log(" by default this command performans forward sweeps until nothing can\n");
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log(" by default this command performans forward sweeps until nothing can\n");
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log(" be merged by forwards sweeps, the backward sweeps until forward\n");
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log(" be merged by forwards sweeps, then backward sweeps until forward\n");
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log(" sweeps are effective again. with this option set only forward sweeps\n");
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log(" sweeps are effective again. with this option set only forward sweeps\n");
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log(" are performed.\n");
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log(" are performed.\n");
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log("\n");
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log("\n");
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log(" -fwonly <cell_type>\n");
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log(" add the specified cell type to the list of cell types that are only\n");
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log(" merged in forward sweeps and never in backward sweeps. $equiv is in\n");
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log(" this list automatically.\n");
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log("\n");
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log(" -icells\n");
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log(" -icells\n");
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log(" by default, the internal RTL and gate cell types are ignored. add\n");
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log(" by default, the internal RTL and gate cell types are ignored. add\n");
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log(" this option to also process those cell types with this command.\n");
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log(" this option to also process those cell types with this command.\n");
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@ -309,6 +316,7 @@ struct EquivStructPass : public Pass {
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}
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}
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virtual void execute(std::vector<std::string> args, Design *design)
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virtual void execute(std::vector<std::string> args, Design *design)
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{
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{
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pool<IdString> fwonly_cells({ "$equiv" });
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bool mode_icells = false;
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bool mode_icells = false;
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bool mode_fwd = false;
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bool mode_fwd = false;
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int max_iter = -1;
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int max_iter = -1;
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@ -325,6 +333,10 @@ struct EquivStructPass : public Pass {
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mode_icells = true;
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mode_icells = true;
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continue;
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continue;
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}
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}
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if (args[argidx] == "-fwonly" && argidx+1 < args.size()) {
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fwonly_cells.insert(RTLIL::escape_id(args[++argidx]));
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continue;
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}
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if (args[argidx] == "-maxiter" && argidx+1 < args.size()) {
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if (args[argidx] == "-maxiter" && argidx+1 < args.size()) {
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max_iter = atoi(args[++argidx].c_str());
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max_iter = atoi(args[++argidx].c_str());
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continue;
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continue;
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@ -341,7 +353,7 @@ struct EquivStructPass : public Pass {
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log(" Reached iteration limit of %d.\n", iter);
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log(" Reached iteration limit of %d.\n", iter);
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break;
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break;
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}
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}
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EquivStructWorker worker(module, mode_fwd, mode_icells, iter+1);
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EquivStructWorker worker(module, mode_fwd, mode_icells, fwonly_cells, iter+1);
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if (worker.merge_count == 0)
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if (worker.merge_count == 0)
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break;
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break;
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module_merge_count += worker.merge_count;
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module_merge_count += worker.merge_count;
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