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addDff -> addDffGate as per @daveshah1

This commit is contained in:
Eddie Hung 2019-02-08 13:17:53 -08:00
parent afc3c4b613
commit 8886fa5506
1 changed files with 1 additions and 1 deletions
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2
frontends/aiger/aigerparse.cc
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@ -176,7 +176,7 @@ void AigerReader::parse_aiger_ascii()
RTLIL::Wire *q_wire = createWireIfNotExists(module, l1);
RTLIL::Wire *d_wire = createWireIfNotExists(module, l2);
module->addDff(NEW_ID, clk_wire, d_wire, q_wire);
module->addDffGate(NEW_ID, clk_wire, d_wire, q_wire);
// Reset logic is optional in AIGER 1.9
if (f.peek() == ' ') {