riscv
/
yosys
mirror of https://github.com/YosysHQ/yosys.git
1
0
Fork 0
Code Issues Projects Releases Wiki Activity

Fixed generate-for (and disabled double warning for auto-wire)

This commit is contained in:
Clifford Wolf 2013-12-04 21:33:00 +01:00
parent 3c220e0b32
commit 853538d78b
1 changed files with 5 additions and 1 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

6
frontends/ast/simplify.cc
View File

@ -513,7 +513,7 @@ bool AstNode::simplify(bool const_fold, bool at_zero, bool in_lvalue, int stage,
}
}
if (current_scope.count(str) == 0) {
log("Warning: Creating auto-wire `%s' in module `%s'.\n", str.c_str(), current_ast_mod->str.c_str());
// log("Warning: Creating auto-wire `%s' in module `%s'.\n", str.c_str(), current_ast_mod->str.c_str());
AstNode *auto_wire = new AstNode(AST_AUTOWIRE);
auto_wire->str = str;
current_ast_mod->children.push_back(auto_wire);
@ -580,6 +580,10 @@ bool AstNode::simplify(bool const_fold, bool at_zero, bool in_lvalue, int stage,
AstNode *next_ast = children[2];
AstNode *body_ast = children[3];
while (body_ast->type == AST_GENBLOCK && body_ast->str.empty() &&
body_ast->children.size() == 1 && body_ast->children.at(0)->type == AST_GENBLOCK)
body_ast = body_ast->children.at(0);
if (init_ast->type != AST_ASSIGN_EQ)
log_error("Unsupported 1st expression of generate for-loop at %s:%d!\n", filename.c_str(), linenum);
if (next_ast->type != AST_ASSIGN_EQ)