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@ -144,7 +144,7 @@ struct ClkPartPass : public Pass {
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{
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bool this_clk_pol = cell->type.in(ID($_DFFE_PN_), ID($_DFFE_PP_));
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bool this_en_pol = !enable_mode || cell->type.in(ID($_DFFE_NP_), ID($_DFFE_PP_));
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key = clkdomain_t(this_clk_pol, assign_map(cell->getPort(ID(C))), this_en_pol, enable_mode ? assign_map(cell->getPort(ID(E)) : RTLIL::SigSpec()));
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key = clkdomain_t(this_clk_pol, assign_map(cell->getPort(ID(C))), this_en_pol, enable_mode ? assign_map(cell->getPort(ID(E))) : RTLIL::SigSpec());
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}
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else
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continue;
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