mirror of https://github.com/YosysHQ/yosys.git
AST ProcessGenerator: replaced subst_*_{from,to} with subst_*_map
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@ -178,18 +178,18 @@ struct AST_INTERNAL::ProcessGenerator
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// This always points to the RTLIL::CaseRule beeing filled at the moment
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RTLIL::CaseRule *current_case;
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// This two variables contain the replacement pattern to be used in the right hand side
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// This map contains the replacement pattern to be used in the right hand side
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// of an assignment. E.g. in the code "foo = bar; foo = func(foo);" the foo in the right
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// hand side of the 2nd assignment needs to be replace with the temporary signal holding
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// the value assigned in the first assignment. So when the first assignement is processed
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// the according information is appended to subst_rvalue_from and subst_rvalue_to.
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RTLIL::SigSpec subst_rvalue_from, subst_rvalue_to;
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std::map<RTLIL::SigBit, RTLIL::SigBit> subst_rvalue_map;
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// This two variables contain the replacement pattern to be used in the left hand side
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// This map contains the replacement pattern to be used in the left hand side
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// of an assignment. E.g. in the code "always @(posedge clk) foo <= bar" the signal bar
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// should not be connected to the signal foo. Instead it must be connected to the temporary
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// signal that is used as input for the register that drives the signal foo.
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RTLIL::SigSpec subst_lvalue_from, subst_lvalue_to;
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std::map<RTLIL::SigBit, RTLIL::SigBit> subst_lvalue_map;
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// The code here generates a number of temprorary signal for each output register. This
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// map helps generating nice numbered names for all this temporary signals.
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@ -214,8 +214,10 @@ struct AST_INTERNAL::ProcessGenerator
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current_case = &proc->root_case;
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// create initial temporary signal for all output registers
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RTLIL::SigSpec subst_lvalue_from, subst_lvalue_to;
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collect_lvalues(subst_lvalue_from, always, true, true);
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subst_lvalue_to = new_temp_signal(subst_lvalue_from);
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subst_lvalue_map = subst_lvalue_from.to_sigbit_map(subst_lvalue_to);
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bool found_anyedge_syncs = false;
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for (auto child : always->children)
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@ -251,8 +253,7 @@ struct AST_INTERNAL::ProcessGenerator
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// create initial assignments for the temporary signals
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if ((flag_nolatches || always->get_bool_attribute("\\nolatches") || current_module->get_bool_attribute("\\nolatches")) && !found_clocked_sync) {
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subst_rvalue_from = subst_lvalue_from;
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subst_rvalue_to = RTLIL::SigSpec(RTLIL::State::Sx, subst_rvalue_from.size());
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subst_rvalue_map = subst_lvalue_from.to_sigbit_map(RTLIL::SigSpec(RTLIL::State::Sx, SIZE(subst_lvalue_from)));
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} else {
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addChunkActions(current_case->actions, subst_lvalue_to, subst_lvalue_from);
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}
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@ -400,15 +401,13 @@ struct AST_INTERNAL::ProcessGenerator
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case AST_ASSIGN_EQ:
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case AST_ASSIGN_LE:
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{
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std::map<RTLIL::SigBit, RTLIL::SigBit> new_subst_rvalue_map = subst_rvalue_from.to_sigbit_map(subst_rvalue_to);
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RTLIL::SigSpec unmapped_lvalue = ast->children[0]->genRTLIL(), lvalue = unmapped_lvalue;
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RTLIL::SigSpec rvalue = ast->children[1]->genWidthRTLIL(lvalue.size(), &new_subst_rvalue_map);
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lvalue.replace(subst_lvalue_from, subst_lvalue_to);
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RTLIL::SigSpec rvalue = ast->children[1]->genWidthRTLIL(lvalue.size(), &subst_rvalue_map);
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lvalue.replace(subst_lvalue_map);
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if (ast->type == AST_ASSIGN_EQ) {
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subst_rvalue_from.remove2(unmapped_lvalue, &subst_rvalue_to);
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subst_rvalue_from.append(unmapped_lvalue);
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subst_rvalue_to.append(rvalue);
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for (int i = 0; i < SIZE(unmapped_lvalue); i++)
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subst_rvalue_map[unmapped_lvalue[i]] = rvalue[i];
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}
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removeSignalFromCaseTree(lvalue, current_case);
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@ -418,9 +417,8 @@ struct AST_INTERNAL::ProcessGenerator
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case AST_CASE:
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{
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std::map<RTLIL::SigBit, RTLIL::SigBit> new_subst_rvalue_map = subst_rvalue_from.to_sigbit_map(subst_rvalue_to);
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RTLIL::SwitchRule *sw = new RTLIL::SwitchRule;
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sw->signal = ast->children[0]->genWidthRTLIL(-1, &new_subst_rvalue_map);
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sw->signal = ast->children[0]->genWidthRTLIL(-1, &subst_rvalue_map);
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current_case->switches.push_back(sw);
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for (auto &attr : ast->attributes) {
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@ -436,13 +434,10 @@ struct AST_INTERNAL::ProcessGenerator
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RTLIL::SigSpec this_case_eq_ltemp = new_temp_signal(this_case_eq_lvalue);
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RTLIL::SigSpec this_case_eq_rvalue = this_case_eq_lvalue;
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this_case_eq_rvalue.replace(subst_rvalue_from, subst_rvalue_to);
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this_case_eq_rvalue.replace(subst_rvalue_map);
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RTLIL::SigSpec backup_subst_lvalue_from = subst_lvalue_from;
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RTLIL::SigSpec backup_subst_lvalue_to = subst_lvalue_to;
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RTLIL::SigSpec backup_subst_rvalue_from = subst_rvalue_from;
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RTLIL::SigSpec backup_subst_rvalue_to = subst_rvalue_to;
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std::map<RTLIL::SigBit, RTLIL::SigBit> backup_subst_lvalue_map = subst_lvalue_map;
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std::map<RTLIL::SigBit, RTLIL::SigBit> backup_subst_rvalue_map = subst_rvalue_map;
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RTLIL::CaseRule *default_case = NULL;
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RTLIL::CaseRule *last_generated_case = NULL;
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@ -452,15 +447,11 @@ struct AST_INTERNAL::ProcessGenerator
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continue;
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log_assert(child->type == AST_COND);
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subst_lvalue_from = backup_subst_lvalue_from;
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subst_lvalue_to = backup_subst_lvalue_to;
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subst_lvalue_map = backup_subst_lvalue_map;
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subst_rvalue_map = backup_subst_rvalue_map;
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subst_rvalue_from = backup_subst_rvalue_from;
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subst_rvalue_to = backup_subst_rvalue_to;
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subst_lvalue_from.remove2(this_case_eq_lvalue, &subst_lvalue_to);
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subst_lvalue_from.append(this_case_eq_lvalue);
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subst_lvalue_to.append(this_case_eq_ltemp);
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for (int i = 0; i < SIZE(this_case_eq_lvalue); i++)
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subst_lvalue_map[this_case_eq_lvalue[i]] = this_case_eq_ltemp[i];
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RTLIL::CaseRule *backup_case = current_case;
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current_case = new RTLIL::CaseRule;
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@ -471,10 +462,8 @@ struct AST_INTERNAL::ProcessGenerator
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default_case = current_case;
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else if (node->type == AST_BLOCK)
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processAst(node);
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else {
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std::map<RTLIL::SigBit, RTLIL::SigBit> new_subst_rvalue_map = subst_rvalue_from.to_sigbit_map(subst_rvalue_to);
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current_case->compare.push_back(node->genWidthRTLIL(sw->signal.size(), &new_subst_rvalue_map));
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}
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else
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current_case->compare.push_back(node->genWidthRTLIL(sw->signal.size(), &subst_rvalue_map));
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}
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if (default_case != current_case)
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sw->cases.push_back(current_case);
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@ -493,17 +482,13 @@ struct AST_INTERNAL::ProcessGenerator
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sw->cases.push_back(default_case);
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}
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subst_lvalue_from = backup_subst_lvalue_from;
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subst_lvalue_to = backup_subst_lvalue_to;
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subst_lvalue_map = backup_subst_lvalue_map;
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subst_rvalue_map = backup_subst_rvalue_map;
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subst_rvalue_from = backup_subst_rvalue_from;
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subst_rvalue_to = backup_subst_rvalue_to;
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for (int i = 0; i < SIZE(this_case_eq_lvalue); i++)
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subst_rvalue_map[this_case_eq_lvalue[i]] = this_case_eq_ltemp[i];
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subst_rvalue_from.remove2(this_case_eq_lvalue, &subst_rvalue_to);
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subst_rvalue_from.append(this_case_eq_lvalue);
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subst_rvalue_to.append(this_case_eq_ltemp);
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this_case_eq_lvalue.replace(subst_lvalue_from, subst_lvalue_to);
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this_case_eq_lvalue.replace(subst_lvalue_map);
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removeSignalFromCaseTree(this_case_eq_lvalue, current_case);
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addChunkActions(current_case->actions, this_case_eq_lvalue, this_case_eq_ltemp);
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}
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