mirror of https://github.com/YosysHQ/yosys.git
Fixes error with vector indicies of the form [2:7] [-12:7]
Make sure that we correctly adjust the value to align it to a zero indexed list with lsb = 0 Signed-off-by: Ethan Mahintorabi <ethanmoon@google.com>
This commit is contained in:
parent
c039da2ec1
commit
82a4a87c97
|
@ -2164,7 +2164,7 @@ void VerificImporter::import_netlist(RTLIL::Design *design, Netlist *nl, std::ma
|
||||||
// that the indicies match LSB = 0 order to match the std::vector
|
// that the indicies match LSB = 0 order to match the std::vector
|
||||||
// to SigSpec LSB = 0 precondition.
|
// to SigSpec LSB = 0 precondition.
|
||||||
if (lsb_index > msb_index) {
|
if (lsb_index > msb_index) {
|
||||||
port_offset = abs(port_offset - lsb_index);
|
port_offset = abs(port_offset - (lsb_index - min(msb_index, lsb_index)));
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
IdString port_name_id = RTLIL::escape_id(port_name);
|
IdString port_name_id = RTLIL::escape_id(port_name);
|
||||||
|
|
Loading…
Reference in New Issue