mirror of https://github.com/YosysHQ/yosys.git
Added "techmap -autoproc"
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27a1bfbec6
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826fdb34d8
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@ -70,6 +70,7 @@ struct TechmapWorker
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bool assert_mode;
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bool assert_mode;
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bool flatten_mode;
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bool flatten_mode;
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bool recursive_mode;
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bool recursive_mode;
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bool autoproc_mode;
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TechmapWorker()
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TechmapWorker()
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{
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{
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@ -77,6 +78,7 @@ struct TechmapWorker
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assert_mode = false;
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assert_mode = false;
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flatten_mode = false;
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flatten_mode = false;
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recursive_mode = false;
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recursive_mode = false;
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autoproc_mode = false;
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}
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}
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std::string constmap_tpl_name(SigMap &sigmap, RTLIL::Module *tpl, RTLIL::Cell *cell, bool verbose)
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std::string constmap_tpl_name(SigMap &sigmap, RTLIL::Module *tpl, RTLIL::Cell *cell, bool verbose)
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@ -148,7 +150,11 @@ struct TechmapWorker
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log("Technology map yielded processes:\n");
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log("Technology map yielded processes:\n");
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for (auto &it : tpl->processes)
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for (auto &it : tpl->processes)
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log(" %s",RTLIL::id2cstr(it.first));
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log(" %s",RTLIL::id2cstr(it.first));
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log_error("Technology map yielded processes -> this is not supported.\n");
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if (autoproc_mode) {
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Pass::call_on_module(tpl->design, tpl, "proc");
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log_assert(SIZE(tpl->processes) == 0);
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} else
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log_error("Technology map yielded processes -> this is not supported (use -autoproc to run 'proc' automatically).\n");
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}
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}
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std::string orig_cell_name;
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std::string orig_cell_name;
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@ -726,6 +732,9 @@ struct TechmapPass : public Pass {
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log(" depth-first algorithm. both methods should yield equivialent results,\n");
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log(" depth-first algorithm. both methods should yield equivialent results,\n");
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log(" but may differ in performance.\n");
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log(" but may differ in performance.\n");
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log("\n");
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log("\n");
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log(" -autoproc\n");
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log(" Automatically call \"proc\" on implementations that contain processes.\n");
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log("\n");
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log(" -assert\n");
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log(" -assert\n");
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log(" this option will cause techmap to exit with an error if it can't map\n");
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log(" this option will cause techmap to exit with an error if it can't map\n");
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log(" a selected cell. only cell types that end on an underscore are accepted\n");
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log(" a selected cell. only cell types that end on an underscore are accepted\n");
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@ -831,7 +840,10 @@ struct TechmapPass : public Pass {
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size_t argidx;
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size_t argidx;
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for (argidx = 1; argidx < args.size(); argidx++) {
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for (argidx = 1; argidx < args.size(); argidx++) {
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if (args[argidx] == "-map" && argidx+1 < args.size()) {
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if (args[argidx] == "-map" && argidx+1 < args.size()) {
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map_files.push_back(args[++argidx]);
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if (args[argidx+1].substr(0, 2) == "+/")
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map_files.push_back(proc_share_dirname() + args[++argidx].substr(2));
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else
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map_files.push_back(args[++argidx]);
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continue;
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continue;
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}
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}
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if (args[argidx] == "-share_map" && argidx+1 < args.size()) {
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if (args[argidx] == "-share_map" && argidx+1 < args.size()) {
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@ -862,6 +874,10 @@ struct TechmapPass : public Pass {
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worker.recursive_mode = true;
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worker.recursive_mode = true;
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continue;
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continue;
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}
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}
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if (args[argidx] == "-autoproc") {
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worker.autoproc_mode = true;
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continue;
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}
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break;
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break;
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}
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}
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extra_args(args, argidx, design);
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extra_args(args, argidx, design);
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