mirror of https://github.com/YosysHQ/yosys.git
BRAM improvements
Signed-off-by: David Shah <dave@ds0.me>
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@ -22,7 +22,7 @@ module \$__ECP5_DP16KD (CLK2, CLK3, A1ADDR, A1DATA, A1EN, B1ADDR, B1DATA, B1EN);
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localparam CLKAMUX = CLKPOL2 ? "CLKA" : "INV";
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localparam CLKBMUX = CLKPOL3 ? "CLKB" : "INV";
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localparam WRITEMODE_A = TRANSP2 ? "WRITETHROUGH" : "NORMAL";
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localparam WRITEMODE_A = TRANSP2 ? "WRITETHROUGH" : "READBEFOREWRITE";
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generate if (CFG_DBITS == 1) begin
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DP16KD #(
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@ -32,12 +32,13 @@ module \$__ECP5_DP16KD (CLK2, CLK3, A1ADDR, A1DATA, A1EN, B1ADDR, B1DATA, B1EN);
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.CLKAMUX(CLKAMUX),
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.CLKBMUX(CLKBMUX),
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.WRITEMODE_A(WRITEMODE_A),
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.WRITEMODE_B("READBEFOREWRITE"),
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.GSR("DISABLED")
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) _TECHMAP_REPLACE_ (
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`include "bram_conn_1.vh"
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.CLKA(CLK2), .CLKB(CLK3),
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.WEA(1'b1), .CEA(|A1EN), .OCEA(1'b1),
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.WEB(1'b0), .CEB(B1EN), .OCEB(1'b1),
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.WEA(|A1EN), .CEA(1'b1), .OCEA(1'b1),
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.WEB(1'b0), .CEB(1'b1), .OCEB(B1EN),
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.RSTA(1'b0), .RSTB(1'b0)
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);
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end else if (CFG_DBITS == 2) begin
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@ -48,12 +49,13 @@ module \$__ECP5_DP16KD (CLK2, CLK3, A1ADDR, A1DATA, A1EN, B1ADDR, B1DATA, B1EN);
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.CLKAMUX(CLKAMUX),
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.CLKBMUX(CLKBMUX),
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.WRITEMODE_A(WRITEMODE_A),
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.WRITEMODE_B("READBEFOREWRITE"),
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.GSR("DISABLED")
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) _TECHMAP_REPLACE_ (
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`include "bram_conn_2.vh"
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.CLKA(CLK2), .CLKB(CLK3),
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.WEA(1'b1), .CEA(|A1EN), .OCEA(1'b1),
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.WEB(1'b0), .CEB(B1EN), .OCEB(1'b1),
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.WEA(|A1EN), .CEA(1'b1), .OCEA(1'b1),
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.WEB(1'b0), .CEB(1'b1), .OCEB(B1EN),
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.RSTA(1'b0), .RSTB(1'b0)
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);
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end else if (CFG_DBITS <= 4) begin
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@ -64,12 +66,13 @@ module \$__ECP5_DP16KD (CLK2, CLK3, A1ADDR, A1DATA, A1EN, B1ADDR, B1DATA, B1EN);
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.CLKAMUX(CLKAMUX),
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.CLKBMUX(CLKBMUX),
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.WRITEMODE_A(WRITEMODE_A),
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.WRITEMODE_B("READBEFOREWRITE"),
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.GSR("DISABLED")
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) _TECHMAP_REPLACE_ (
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`include "bram_conn_4.vh"
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.CLKA(CLK2), .CLKB(CLK3),
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.WEA(1'b1), .CEA(|A1EN), .OCEA(1'b1),
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.WEB(1'b0), .CEB(B1EN), .OCEB(1'b1),
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.WEA(|A1EN), .CEA(1'b1), .OCEA(1'b1),
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.WEB(1'b0), .CEB(1'b1), .OCEB(B1EN),
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.RSTA(1'b0), .RSTB(1'b0)
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);
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end else if (CFG_DBITS <= 9) begin
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@ -80,12 +83,13 @@ module \$__ECP5_DP16KD (CLK2, CLK3, A1ADDR, A1DATA, A1EN, B1ADDR, B1DATA, B1EN);
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.CLKAMUX(CLKAMUX),
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.CLKBMUX(CLKBMUX),
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.WRITEMODE_A(WRITEMODE_A),
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.WRITEMODE_B("READBEFOREWRITE"),
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.GSR("DISABLED")
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) _TECHMAP_REPLACE_ (
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`include "bram_conn_9.vh"
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.CLKA(CLK2), .CLKB(CLK3),
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.WEA(1'b1), .CEA(|A1EN), .OCEA(1'b1),
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.WEB(1'b0), .CEB(B1EN), .OCEB(1'b1),
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.WEA(|A1EN), .CEA(1'b1), .OCEA(1'b1),
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.WEB(1'b0), .CEB(1'b1), .OCEB(B1EN),
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.RSTA(1'b0), .RSTB(1'b0)
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);
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end else if (CFG_DBITS <= 18) begin
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@ -96,12 +100,13 @@ module \$__ECP5_DP16KD (CLK2, CLK3, A1ADDR, A1DATA, A1EN, B1ADDR, B1DATA, B1EN);
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.CLKAMUX(CLKAMUX),
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.CLKBMUX(CLKBMUX),
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.WRITEMODE_A(WRITEMODE_A),
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.WRITEMODE_B("READBEFOREWRITE"),
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.GSR("DISABLED")
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) _TECHMAP_REPLACE_ (
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`include "bram_conn_18.vh"
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.CLKA(CLK2), .CLKB(CLK3),
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.WEA(1'b1), .CEA(|A1EN), .OCEA(1'b1),
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.WEB(1'b0), .CEB(B1EN), .OCEB(1'b1),
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.WEA(|A1EN), .CEA(1'b1), .OCEA(1'b1),
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.WEB(1'b0), .CEB(1'b1), .OCEB(B1EN),
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.RSTA(1'b0), .RSTB(1'b0)
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);
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end else begin
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