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equiv_opt: pass -D EQUIV when techmapping. 

This allows avoiding techmap crashes e.g. because of large memories
in white-box cell models.
This commit is contained in:
whitequark 2018-12-07 16:58:33 +00:00
parent c38ea9ae65
commit 7ff5a9db2d
4 changed files with 7 additions and 6 deletions
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6
passes/equiv/equiv_opt.cc
View File

@ -137,10 +137,12 @@ struct EquivOptPass : public ScriptPass
if ((!techmap_opts.empty() || help_mode) && check_label("techmap", "(only with -map)")) if ((!techmap_opts.empty() || help_mode) && check_label("techmap", "(only with -map)"))
{ {
string opts;
if (help_mode) if (help_mode)
run("techmap -autoproc -map <filename> ..."); opts = " -map <filename> ...";
else else
run("techmap -autoproc" + techmap_opts); opts = techmap_opts;
run("techmap -D EQUIV -autoproc" + opts);
} }
if (check_label("prove")) if (check_label("prove"))

2
techlibs/ice40/cells_sim.v
View File

@ -928,6 +928,7 @@ module SB_SPRAM256KA (
output reg [15:0] DATAOUT output reg [15:0] DATAOUT
); );
`ifndef BLACKBOX `ifndef BLACKBOX
`ifndef EQUIV
reg [15:0] mem [0:16383]; reg [15:0] mem [0:16383];
wire off = SLEEP || !POWEROFF; wire off = SLEEP || !POWEROFF;
integer i; integer i;
@ -954,6 +955,7 @@ module SB_SPRAM256KA (
end end
end end
`endif `endif
`endif
endmodule endmodule
(* blackbox *) (* blackbox *)

3
tests/opt/ice40_carry.v
View File

@ -1,3 +0,0 @@
module SB_CARRY (output CO, input I0, I1, CI);
assign CO = (I0 && I1) || ((I0 || I1) && CI);
endmodule

2
tests/opt/opt_lut.ys
View File

@ -1,4 +1,4 @@
read_verilog opt_lut.v read_verilog opt_lut.v
synth_ice40 synth_ice40
ice40_unlut ice40_unlut
equiv_opt -map ice40_carry.v -assert opt_lut -dlogic SB_CARRY:I0=1:I1=2:CI=3 equiv_opt -map +/ice40/cells_sim.v -assert opt_lut -dlogic SB_CARRY:I0=1:I1=2:CI=3