mirror of https://github.com/YosysHQ/yosys.git
greenpak: Fixes to GP_DCMP* blocks. Added GP_CLKBUF.
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@ -49,6 +49,10 @@ module GP_BANDGAP(output reg OK);
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endmodule
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module GP_CLKBUF(input wire IN, output wire OUT);
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assign OUT = IN;
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endmodule
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module GP_COUNT8(input CLK, input wire RST, output reg OUT);
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parameter RESET_MODE = "RISING";
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@ -132,7 +136,8 @@ module GP_DAC(input[7:0] DIN, input wire VREF, output reg VOUT);
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endmodule
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module GP_DCMP(input[7:0] INP, input[7:0] INN, input CLK, input PWRDN);
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module GP_DCMP(input[7:0] INP, input[7:0] INN, input CLK, input PWRDN, output reg OUTP, output reg OUTN);
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//TODO finish implementing
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endmodule
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module GP_DCMPREF(output reg[7:0]OUT);
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@ -144,22 +149,22 @@ module GP_DCMPMUX(input[1:0] SEL, input[7:0] IN0, input[7:0] IN1, input[7:0] IN2
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always @(*) begin
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case(SEL)
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2'b00: begin
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2'd00: begin
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OUTA <= IN0;
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OUTB <= IN3;
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end
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2'b01: begin
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2'd01: begin
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OUTA <= IN1;
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OUTB <= IN2;
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end
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2'b02: begin
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2'd02: begin
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OUTA <= IN2;
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OUTB <= IN1;
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end
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2'b03: begin
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2'd03: begin
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OUTA <= IN3;
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OUTB <= IN0;
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end
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