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$readmem[hb] file inclusion is now relative to the Verilog file 

Signed-off-by: Rodrigo Alejandro Melo <rodrigomelo9@gmail.com>
This commit is contained in:
Rodrigo Alejandro Melo 2020-01-31 18:20:22 -03:00
parent a1c840ca5d
commit 7b3fe404ab
2 changed files with 4 additions and 2 deletions
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3
CHANGELOG
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@ -53,12 +53,13 @@ Yosys 0.9 .. Yosys 0.9-dev
- Added support for flip-flops with synchronous reset to synth_xilinx
- Added support for flip-flops with reset and enable to synth_xilinx
- Added "check -mapped"
- Added checking of SystemVerilog always block types (always_comb,
- Added checking of SystemVerilog always block types (always_comb,
always_latch and always_ff)
- Added "xilinx_dffopt" pass
- Added "scratchpad" pass
- Added "abc9 -dff"
- Added "synth_xilinx -dff"
- Improved support of $readmem[hb] file inclusion which is now relative to the Verilog file
Yosys 0.8 .. Yosys 0.9
----------------------

3
frontends/ast/simplify.cc
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@ -2886,7 +2886,8 @@ AstNode *AstNode::readmem(bool is_readmemh, std::string mem_filename, AstNode *m
int meminit_size=0;
std::ifstream f;
f.open(mem_filename.c_str());
std::string path = filename.substr(0, filename.find_last_of("\\/")+1);
f.open(path + mem_filename.c_str());
yosys_input_files.insert(mem_filename);
if (f.fail())